From ff7091e9f46c513af3d76d5092a1cc96eb4b7328 Mon Sep 17 00:00:00 2001 From: James Vogenthaler Date: Thu, 24 Jul 2025 16:34:14 -0600 Subject: [PATCH] flashchips: Add P25D80H Adds support for the PUYA P25D80H flashchip. Tested: Probing RDID, reading, erasing, and writing to a single chip. Programmer: A serprog implementation that was flashed to a Raspbery Pi Pico 2. Parameters: Tested at 1Mhz OS: Raspberry Pi OS 64-bit running kernel version 6.12.38 Datasheet: https://lcsc.com/datasheet/lcsc_datasheet_2304140030_PUYA-P25D80H-SSH-IT_C559199.pdf Change-Id: I48612c369b555fb8c3f3cfe3ce0d00d3fd35a64f Signed-off-by: James Vogenthaler Reviewed-on: https://review.coreboot.org/c/flashrom/+/88555 Tested-by: build bot (Jenkins) Reviewed-by: Anastasia Klimchuk --- flashchips/puya.c | 43 +++++++++++++++++++++++++++++++++++++++++++ include/flashchips.h | 1 + 2 files changed, 44 insertions(+) diff --git a/flashchips/puya.c b/flashchips/puya.c index 8395b47be..685e1219d 100644 --- a/flashchips/puya.c +++ b/flashchips/puya.c @@ -146,3 +146,46 @@ .read = SPI_CHIP_READ, .voltage = {2300, 3600}, }, + + { + .vendor = "PUYA", + .name = "P25D80H", + .bustype = BUS_SPI, + .manufacture_id = PUYA_ID, + .model_id = PUYA_P25D80H, + .total_size = 1024, + .page_size = 256, + /* supports SFDP */ + /* OTP: 3 x 512 bytes */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_SCUR | FEATURE_CFGR, + .tested = TEST_OK_PREW, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {256, 4096} }, + .block_erase = SPI_BLOCK_ERASE_81, + }, { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2300, 3600}, + }, diff --git a/include/flashchips.h b/include/flashchips.h index fb1be827f..767df2955 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -662,6 +662,7 @@ #define PUYA_P25Q06H 0x4010 #define PUYA_P25Q11H 0x4011 #define PUYA_P25Q21H 0x4012 +#define PUYA_P25D80H 0x6014 /* * The Sanyo chip found so far uses SPI, first byte is manufacturer code,