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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00

57 Commits

Author SHA1 Message Date
Carl-Daniel Hailfinger
b22918cadc Only probe for chips with compatible bus protocols
It doesn't make sense to probe for SPI chips on a LPC host, nor does it
make sense to probe for LPC chips on a Parallel host.

This change is backwards compatible, but adding host protocol info to
chipset init functions will speed up probing.

Once all chipset init functions are updated and the Winbond W29EE011 and
AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can
be deleted as the W29/A49 conflict magically disappears.

Corresponding to flashrom svn r560.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested on real hardware and
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-06-01 02:08:58 +00:00
Urja Rannikko
211fa97ce8 Fix warning in satasii.c when compiling with gcc 4.4.0
Corresponding to flashrom svn r558.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-31 21:35:10 +00:00
Uwe Hermann
e8ba538d03 A bunch of output beautifications and improvements, as well as doc fixes
- Update manpage, we now report supported boards via -L.
 
 - Add some missing escaping for '-' characters in the manpage.

Corresponding to flashrom svn r543.

 - Shorten some of the really long device names, so that -L output looks
   nicer.
   
 - Display a "table header" for all entries/columns in -L output.
 
 - Make -L output tabular for all lists for better readability.
 
 - Do not print "unknown XXXX SPI chip" entries in -L output.
 
 - And random other cosmetics...
 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
2009-05-22 11:37:27 +00:00
Uwe Hermann
b2f7a2f309 The Silicon Image PCI0680 has bit 26 marked as reserved, so don't use it
Corresponding to flashrom svn r537.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-20 17:09:43 +00:00
Uwe Hermann
cdde6da8e5 Mark the Silicon Image PCI0680 Ultra ATA-133 controller as working
I tested identify, read, write, erase, verify successfully, HOWEVER,
this will only work (at least on my card) after de-soldering the
soldered-on PLCC32 one-time programmable (OTP) chip (Holtek HT27C010)
and soldering on a (re-)programmable flash ROM chip or a socket.

Example:

http://www.coreboot.org/File:Sii_controller1.jpg
http://www.coreboot.org/File:Sii_controller2.jpg

The OTP chip which came on my card does not react to the standard JEDEC
identify/read/write/erase commands anymore, so if all other such PCI0680
controllers which are around also have the same OTP chip (that's not
necessarily the case), they cannot be used as "external programmer" in
flashrom without the above mentioned modifications.

Corresponding to flashrom svn r536.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-19 21:03:31 +00:00
Uwe Hermann
c6915939d9 Factor out fallback_map/unmap, most external programmers don't need and special handling here
Corresponding to flashrom svn r531.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-17 23:12:17 +00:00
Uwe Hermann
3def09d401 Rename sata_sii.c to satasii.c for consistency
Corresponding to flashrom svn r530.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-17 22:58:41 +00:00