Match on SMBus and Audio.
lspci/superiotool/flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-September/004689.html
Corresponding to flashrom svn r1159.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Tested-by: Alexander Mikhnovets <alexander.mikhnovets@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read,
erase and write all work.
Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset
as tested.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html
Corresponding to flashrom svn r1158.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004436.html
This goes the safe route of adding a match for the P4P800 that does not
match the P4P800-E Deluxe which is already in. It seems quite likely that
the whole P4P800 family could use the same board enable with one generic
board enable match, though.
This match uses host bridge + audio, because all other IDs match the
P4P800-E Deluxe board, as reported in
http://www.e-monkeys.de/Everest-Bericht.txt
(no user feedback, commit as "untested")
Corresponding to flashrom svn r1157.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004539.html
matching SMBus + Audio, because SMBus is the only core device with
usable IDs.
Corresponding to flashrom svn r1156.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Marked as untested for now, as there was no response from the user.
Corresponding to flashrom svn r1155.
Signed-off-by: Sergey A Lichack <shadowpilot34@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware.
The last line in nicintel_request_spibus() could be changed so that FL_BUSY
is used instead.
Shortened sample log:
[...]
Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).
Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.
Multiple flash chips were detected: M25P05.RES M25P10.RES
Please specify which chip to use with the -c <chipname> option.
[...]
Corresponding to flashrom svn r1151.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add FEATURE_WRSR_WREN to feature_bits for all Macronix SPI flash chips
to indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1150.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for some AMIC SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1149.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for many Eon SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1148.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for all Winbond SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1147.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Many thanks to Michael Karcher for reverse engineering this.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html
Corresponding to flashrom svn r1146.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Add paranoid checks for correct values in essential registers in the SB600/SB700/... SPI driver. If something else changes the values we
wrote, we will see severe read/write corruption.
sb600spi will now abort the access and return an error if it detects
this sort of corruption.
Note: This corruption can be caused by a few different events:
- IPMI/BMC/IMC accesses flash
- Other software accesses flash
The nature of flash access (read/write/ID/...) is irrelevant. Each such
access will cause corruption for all other accesses happening at the
same time.
Thanks to Matthias Kretz for testing this patch.
Corresponding to flashrom svn r1145.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Matthias Kretz <kretz@kde.org>
The datasheet says there's a set of registers in the 4Mbit before the
flash memory. The block locking registers are aligned on 64K
boundaries, plus 2.
Write/erase sucessful on a system it failed before:
http://www.flashrom.org/pipermail/flashrom/2010-August/004432.html
Corresponding to flashrom svn r1144.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This patch changes the intel_piix4_gpo_set() function to always check
the GENCFG and XBCS registers for the availability of the
requested GPO line before raising/lowering it and fails otherwise. It
makes no attempt to bypass the values in these configuration
registers.
The old flashrom code did consider it safe to reprogram (multiplexed)
GPO:s 22-26 without checking the value of the controlling register
(GENCFG). I do not really know why.
I have tested this patch on an Asus P2B-N (needs GPO18 low) and MSI
MS-6163 Pro (needs GPO14 high).
The information for these registers are from the Intel "82371AB
PCI-TO-ISA / IDE XCELERATOR (PIIX4)" datasheet available here:
http://www.intel.com/design/intarch/datashts/29056201.pdf
Corresponding to flashrom svn r1142.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
- There are number of boards that have board-enables in board-enable.c but
have no corresponding entry in print.c (with or without URL doesn't matter)
and thus appear neither in the "flashrom -L" list of boards nor in the
wiki output. Fix this by adding entries for them in print.c.
- abit AN-M2
- abit KN8 Ultra
- ASUS A8Jm (laptop)
- ASUS A8N (might need changing to "A8N-SLI Deluxe", see
http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html)
- ASUS A8N-LA (Nagami-GL8E)
- ASUS P4B533-E
- ASUS P4S800-MX
- HP ProLiant DL165 G6
- IBASE MB899
- Intel SE440BX-2 (marked as non-working for now though, due to
http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html)
- MSI MS-6577 (Xenon)
- MSI MS-7207 (K8NGM2-L)
- Fix / amend a few board names:
- Add "ProLiant" name to the "DL145 G3" (and the new "DL165 G6"), we
use such "series" names for various other boards (e.g. "Vectra" etc)
and it also helps users googling for those names.
- HP "Vectra VL400 PC" should be "Vectra VL400" really, I'm pretty sure
the "PC" is not part of the board name but simply stands for
"personal computer". Same for "Vectra VL420 SFF PC".
- Change "ASUS A8JM" to "ASUS A8Jm" as per vendor website.
- Add comments for boards which may be listed with incorrect names,
I sent out clarification requests to the list, URLs listed as comment.
- Add "Xenon" HP name to the "MSI MS-6577" OEM board.
- Fix typo in "MS-7207 (K8N GM2-L)", should be "MS-7207 (K8NGM2-L)" as
per vendor website.
Corresponding to flashrom svn r1141.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Change the DMI string to only match this exact board (DMI "NAGAMI2L")
as only this one is tested.
Similar HP OEM boards might also work using this board-enable but that's
not sure and not tested. Two of those boards have DMI strings "NAGAMI"
and "NAGAMI2".
Corresponding to flashrom svn r1140.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004414.html
(URL added by Michael Karcher)
Corresponding to flashrom svn r1139.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
I had to use the USB controller in the board enable because all other
subsystem IDs are having vendor: Gigabyte but mostly copy the Intel
product IDs.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004420.html
Corresponding to flashrom svn r1138.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Thomas Kalka <thomas.kalka@googlemail.com>
(At least) for the QM57 which i have tested an additional patch was
needed as some reserved bits in the "Software Sequencing Flash Control
Register" (SSFC) needs to be programmed to 1 in the QM57.
Corresponding to flashrom svn r1137.
Signed-off-by: Helge Wagner <helge.wagner@ge.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Dmidecode emits a warning message about unsupported SMBIOS versions
to stdout before the information asked for when using "-s". I consider
this behaviour broken, but we still need to workaround it as e.g. Fedora
currently distributes an dmidecode with this behaviour.
Corresponding to flashrom svn r1136.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
- Fix incorrect whitespace, indentation, and coding style in some places.
- Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use
it, the comments are useless as we don't have any Doxygen markup in there.
- Use consistent vendor name spelling as per current website (NVIDIA,
abit, GIGABYTE).
- Use consistent / common format for "Suited for:" lines in board_enable.c.
- Add some missing 'void's in functions taking no arguments.
- Add missing fullstops in sentences, remove them from non-sentences (lists).
Corresponding to flashrom svn r1134.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This was successfully tested by 'kai2343' on IRC.
Thanks to Michael Karcher for finding the board enable.
Corresponding to flashrom svn r1133.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Thanks to "Putlinuxonit" <putlinuxonit@gmail.com> for reporting
and testing.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004309.html
Corresponding to flashrom svn r1131.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Tested on Asus P4S800-MX.
Corresponding to flashrom svn r1128.
Signed-off-by: David Borg <borg.db@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Various whitespace- and cosmetic fixes. Also, Use %04x:%04x for printing
the USB IDs (which are 4 hex digits long), not %02x:%02x.
Corresponding to flashrom svn r1123.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The AAI code rewrite in r1052 introduced a bug: The writelen of AAI
continuation is 3 bytes, but the code incorrectly had 6 bytes there.
This causes all AAI writes (except the first two bytes of a chip) to
fail. Thanks to den_m for reporting the bug and for testing the fix.
Corresponding to flashrom svn r1121.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
If we violate the raw SPI communication protocol requirements of the Bus
Pirate (namely, waiting for the completion of one command before sending
the next one), we can reduce the number of round trips by a factor of 3.
The FT2232 chip present in the Bus Pirate has a big enough buffer (at
least 128 bytes IIRC) to avoid overflows in the tiny buffer of the Bus
Pirate PIC.
Thanks to Daniel Flinkmann for sponsoring development of this patch.
Corresponding to flashrom svn r1120.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Daniel Flinkmann <DFlinkmann@gmx.de>
Acked-by: Daniel Flinkmann <dflinkmann@gmx.de>
Add support for the Amontec JTAGkey2, see
http://www.amontec.com/jtagkey2.shtmlhttp://www.amontec.com/jtagkey.shtml.
This FTDI 2232H variant has an additional output enable, which will be
set to its "on" (L) when CS is pulled low. But it lacks a power supply
and you need an external 3.3V source.
The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It
should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I
only have a JTAGkey2 here for testing.
Add all FT2232H/FT4232H based programmers to the list printed with
flashrom -L
Corresponding to flashrom svn r1119.
Signed-off-by: Jörg Fischer <turboj@gmx.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Allow compilation on all architectures even if direct hardware access
primitives are missing, if all you need is userspace access to the
serial port (serprog, buspirate) or no access at all (dummy).
Corresponding to flashrom svn r1116.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add support for Atmel AT25DF081A and AT25DQ161.
Some chips require EWSR before WRSR, others require WREN before WRSR,
and some support both variants. Add feature_bits to select the correct
SPI command, and default to EWSR.
Corresponding to flashrom svn r1115.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Steven Rosario
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix alphabetic sort order for manufacturers in flashchips.c.
Rename a few EON chips to Eon.
Corresponding to flashrom svn r1114.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Huge thanks go to Michael Karcher for reverse engineering the interface
and to Johannes Sjölund for testing the first iterations of my patch on
his hardware until it worked.
Thanks to the following testers of the patch:
* MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland
* MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
* MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt
* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson"
flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x
SPI is detected.
Corresponding to flashrom svn r1113.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Convert all PCI-based external programmers to use special little-endian
accessors for all MMIO regions of PCI devices. This patch does _not_
touch the internal programmer (which is PCI-based as well).
Huge thanks go to Misha Manulis who worked with me to create a first
version of this patch for the satasii programmer based on modification
of generic code.
Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_
prefix for the abstraction layer.
NOTE to package maintainers: With this patch, compilation and usage of
flashrom should be safe on x86, x86_64, MIPS (little and big endian) and
PowerPC (big endian).
The internal programmer is disabled on non-x86/x86_64 (but it
compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi
can not be compiled on non-x86/x86_64 because port space I/O is
not (yet) supported. Please compile with default settings on
x86/x86_64 and with the following settings on all other architectures:
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no
CONFIG_RAYER_SPI=no
Corresponding to flashrom svn r1111.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
This allows USB-based external programmers to be used by non-root users
(which are in the 'plugdev' group). The file is to be installed by the
distros into the proper place (not sure if this is distro-specific). On
Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules.
On some systems the 'plugdev' group might have to adapted to whatever
the respective distro uses.
The following devices are listed so far:
- Amontec JTAGkey(2)
- Buspirate
- Dediprog SF100
- DLP Design DLP-USB1232H
- FTDI FT4232H Mini-Module
Corresponding to flashrom svn r1110.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
