Add support for AMD Am29LV001BB, Am29LV001BT, Am29LV002BB, Am29LV002BT,
Am29LV004BB, Am29LV004BT, Am29LV008BB, Am29LV008BT.
Thanks to Mark Pustjens for testing the Am29LV001BB.
Corresponding to flashrom svn r1260.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Also bit 5 is the Erase/Program Error (EPE) bit, so has nothing to do
with the block protection. Ignore it when testing for block protections.
Corresponding to flashrom svn r1251.
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Tested-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Add code for the unlocking (erasing/writing) of Winbond W39V040FB
chips, enabling erasing/writing this type of chip.
Corresponding to flashrom svn r1248.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Print lock status for all supported Winbond W39* chips:
W39V040A, W39V040B, W39V040C, W39V040FA, W39V040FB, W39V040FC,
W39V080A, W39V080FA, W39V080FA (dual mode).
Fill in correct probe timing for Winbond W39V040C and W39V080FA.
Please note that the W39V040B/W39V040FB pair has identical IDs,
identical read/write/erase, but locking differs. Same applies to
W39V040C/W39V040FC. This causes double detection on chipsets which
support LPC and FWH, making flashing more difficult because the user
has to select the correct chip. This is called the evil twin problem.
A better evil twin handling (patch available) will resolve that problem.
Corresponding to flashrom svn r1245.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
The project is in the the process of designing and making a complete,
open source, graphics card. More info at http://wiki.opengraphics.org.
The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
own flash and does not need to be programmed by flashrom - it ensures
that the device can enumerate on the PCI bus without needing further
configuration.
The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
smaller (128 KBytes). This patch adds support for programming either of
the two SPI flash chips.
The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).
Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested
for write.
Corresponding to flashrom svn r1241.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested S25FL064A using a Bus Pirate.
Corresponding to flashrom svn r1237.
Signed-off-by: Rudy Host <segfault@committeeofdoom.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Kill duplicated code.
Annotate write functions with their chunk size.
Mark Fujitsu MBM29F400BC and ST M29F400BB as untested because their
write code no longer uses a broken layout.
Corresponding to flashrom svn r1210.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Flashrom had an implicit erase-on-write for most flash chip and
programmer drivers, but it was not entirely consistent.
Some drivers had their own hand-rolled partial update functionality
which made handling partial updates from generic code impossible.
Move implicit erase out of chip drivers, and kill some dead erase
functions at the same time. A full chip erase is now performed in the
generic code for all flash chips on write, and after that the whole chip
is written.
Corresponding to flashrom svn r1206.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Use AAI write for SST SST25VF032B.
Speedup from 228 to 113 seconds.
Use page (256 byte) write for SST SST25VF064C.
Speedup from 3091 to 123 seconds.
Corresponding to flashrom svn r1194.
Signed-off-by: Helge Wagner <helge.wagner@ge.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Rename constants W_nnnn -> WINBOND_Wnnnn W_25nnn -> WINBOND_NEX_W25nnn.
Kill incorrect ASD chip and vendor id.
Group Winbond SPI and parallel chips separately (they have different
vendor IDs).
Change constant names to the "canonical" chip name for the following
ids:
W_29C020C (0x45)
-> WINBOND_W29C020 (Same as W29C020C, W29C022 and ASD AE29F2008)
W_29C040P (0x46)
-> WINBOND_W29C040 ("P" is for package type [32-pin PLCC], irrelevant)
W_29C011 + W_29EE011 (0xC1)
-> WINBOND_W29C010 (Same as W29C010M, W29C011A, W29EE011, W29EE012,
and ASD AE29F1008)
List all chip variants in the .name strings in flashchips.c
Have two identical entries for Winbond
W29C010(M)/W29C011A/W29EE011/W29EE012 but with different probe functions
in flashchips.c as sometimes (for newer revisions of these chips?) the
standard jedec probe seems to work. E.g. see test report here:
http://patchwork.coreboot.org/patch/1476/
Also add ids for the following Winbond chips:
W25Q40
W25Q128
W19B160BB
W19B160BT
W19B320SB/W19L320SB
W19B320ST/W19L320ST
W19B322MB
W19B322MT
W19B323MB
W19B323MT
W19B324MB
W19B324MT
W29C512A/W29EE512
W39L010
W39L040A
W39L512
W49F002/W49F002B
Corresponding to flashrom svn r1168.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Probe, read, erase and write have been tested and all are functional.
Corresponding to flashrom svn r1165.
Signed-off-by: Jason Shriver <j.shriver@f5.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add FEATURE_WRSR_WREN to feature_bits for all Macronix SPI flash chips
to indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1150.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for some AMIC SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1149.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for many Eon SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1148.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Add FEATURE_WRSR_WREN to feature_bits for all Winbond SPI flash chips to
indicate that spi_write_status_register() needs WREN instead of EWSR.
Corresponding to flashrom svn r1147.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The datasheet says there's a set of registers in the 4Mbit before the
flash memory. The block locking registers are aligned on 64K
boundaries, plus 2.
Write/erase sucessful on a system it failed before:
http://www.flashrom.org/pipermail/flashrom/2010-August/004432.html
Corresponding to flashrom svn r1144.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Add support for Atmel AT25DF081A and AT25DQ161.
Some chips require EWSR before WRSR, others require WREN before WRSR,
and some support both variants. Add feature_bits to select the correct
SPI command, and default to EWSR.
Corresponding to flashrom svn r1115.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Steven Rosario
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix alphabetic sort order for manufacturers in flashchips.c.
Rename a few EON chips to Eon.
Corresponding to flashrom svn r1114.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
http://www.amictechnology.com/pdf/A25L20P.pdf covers:
AMIC A25L05PT
AMIC A25L05PU
AMIC A25L10PT
AMIC A25L10PU
AMIC A25L20PT
AMIC A25L20PU
http://www.amictechnology.com/pdf/A25L16P.pdf covers:
AMIC A25L16PT
AMIC A25L16PU
Clarify the situation surrounding the A25L40PT and A25L40PU chips which
share the same RDID values, despite the fact that their erase block
layouts are different. Rudolf Marek tested and confirmed the distinct
erase block layouts of these chips.
Add a pretty-printer for the AMIC SPI chip status register
Add a generic AMIC chip type.
Corresponding to flashrom svn r1096.
Signed-off-by: Daniel Lenski <dlenski@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This chip is used on some Xbox versions.
Corresponding to flashrom svn r1086.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Alec Wright <alecjw@member.fsf.org>
Use full-chip write function on Fujitsu MBM29F400TC and ST M29F400BT.
Add support for ST M29F400BB.
Corresponding to flashrom svn r1083.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Actually check if the unlock worked instead of just assuming it worked.
Corresponding to flashrom svn r1082.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
However, wrap the write functions in a compat layer to allow converting
the rest of flashrom later. Tested on Intel NM10 by David Hendricks.
Corresponding to flashrom svn r1080.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This is a 1 MB SPI chip that seems to be straightforwardly related
to the AMIC A25L40PU, which has half the capacity but is otherwise
identical.
Datasheet is at http://www.amictechnology.com/pdf/A25L80P.pdf
flashrom -VE, -Vr, and -Vw has been tested using the AMD SB7x0
interface. Everything works fine... at least, I used it to upgrade my
BIOS and I've been able to reboot.
Corresponding to flashrom svn r1075.
Signed-off-by: Daniel Lenski <dlenski@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
SPI chips never should use read_memmapped. The SPI master code might
decide that read_memmapped is fine for this chip, though, in a lower
layer.
Corresponding to flashrom svn r1074.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r1056.
Signed-off-by: David Borg <borg.db@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r1050.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Corresponding to flashrom svn r1036.
Signed-off-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
