1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

6 Commits

Author SHA1 Message Date
Edward O'Callaghan
3e67cb7b78 raiden_debug_spi.c: Add a delay following AP/EC flash enable
Add a delay following the AP and EC flash enable requests. This allows
any power rails enabled by these signals to settle and to meet the power
on to first SPI write timing requirements.

Forward ports the downstream commit:
   https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2036738

Change-Id: I4c1777777ee67580605c6e6f4c0c228cccc392c7
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-11 06:26:37 +00:00
Edward O'Callaghan
8b191f5ced raiden_debug_spi.c: Disable retry during some error codes
Forward ports the downstream commit:
 https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2073077

Change-Id: I77def28040fea8d1ecf102463180378f8612b00e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-11 06:25:14 +00:00
Edward O'Callaghan
2141250162 raiden_debug_spi.c: Implement retry mechanism
This overcomes a problem with the ServoMicro where USB packets can be
ack'd by the device without triggering interrupts or loading data into
the USB endpoints. The retry mechanism attempts the USB read 3 times
before reattempting the write call to avoid performing multiple SPI
transfers due to a USB problem. This process repeats 3 times before we
return the last error code. Intermediary problems are reported in the
status code.

Based off the downstream commit:
  https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2038271

Change-Id: I76cde68852fa4963582d57c7dcb9f24de32c6da8
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-11 06:24:10 +00:00
Edward O'Callaghan
e8c0ee7c7e raiden_debug_spi.c: Clean up RW ops into sep paths
- The USB SPI interface has been split up into write and read stages.
 - The packet packing has been transitioned from array based to a
   struct.

This was based off the downstream commit:
  https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2036508

Change-Id: Id3a2a544c1c7e1d969a5157977b8a1c7af18371b
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39309
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-11 06:23:05 +00:00
Edward O'Callaghan
4847496062 raiden_debug_spi.c: Fix indents to be consistent
Change-Id: I414d6e5fcb590a006dd53fa93df80ec2a765c5d1
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39308
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-11 06:21:03 +00:00
Edward O'Callaghan
ad08aef69c raiden_debug: Upstream ChromiumOS servo debug board prog
Initial check-in of the Raiden debugger programmer.

Squash in,
  raiden_debug: Add missing .write_aai cb fn
  raiden_debug: greatly improve protocol documentation

BUG=b:143389556
BRANCH=none
TEST=builds

Change-Id: Ifad273a708acea4de797a0808be58960635a8864
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/38209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-03-03 06:02:23 +00:00