2 Commits

Author	SHA1	Message	Date
Hsuan Ting Chen	98cff507ca	how_to_add_new_chip: Add a section for feature bits and WRSR handling ... Feature bits are too complicated to understand if we only read the codes/datasheets. Add a new section in how_to_add_new_chip to add more details about each feature bits. Add the detailed explanation for WRSR handling first. If this new section looks good, I'll try to add some more sections in further commits. BUG=b:345154585 TEST=meson compile -C builddir and view the doc. Change-Id: I34c20933a375380c8702f79ac637595cd3466000 Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/82908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>	2024-07-26 08:01:24 +00:00
Anastasia Klimchuk	c52f949b62	doc: Add docs how to add and update test status of flashchips ... For reference, link to doc about adding new chip on the old website: https://wiki.flashrom.org/Development_Guidelines#Adding/reviewing_a_new_flash_chip Docs on how to update test status of flashchips never existed before. Change-Id: I8dde689f2a0430ae10d3fa68bee727c5a9d70aec Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/80205 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org>	2024-02-03 07:06:49 +00:00