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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 15:33:42 +02:00

4 Commits

Author SHA1 Message Date
Uwe Hermann
b2f7a2f309 The Silicon Image PCI0680 has bit 26 marked as reserved, so don't use it
Corresponding to flashrom svn r537.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-20 17:09:43 +00:00
Uwe Hermann
cdde6da8e5 Mark the Silicon Image PCI0680 Ultra ATA-133 controller as working
I tested identify, read, write, erase, verify successfully, HOWEVER,
this will only work (at least on my card) after de-soldering the
soldered-on PLCC32 one-time programmable (OTP) chip (Holtek HT27C010)
and soldering on a (re-)programmable flash ROM chip or a socket.

Example:

http://www.coreboot.org/File:Sii_controller1.jpg
http://www.coreboot.org/File:Sii_controller2.jpg

The OTP chip which came on my card does not react to the standard JEDEC
identify/read/write/erase commands anymore, so if all other such PCI0680
controllers which are around also have the same OTP chip (that's not
necessarily the case), they cannot be used as "external programmer" in
flashrom without the above mentioned modifications.

Corresponding to flashrom svn r536.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-19 21:03:31 +00:00
Uwe Hermann
c6915939d9 Factor out fallback_map/unmap, most external programmers don't need and special handling here
Corresponding to flashrom svn r531.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-17 23:12:17 +00:00
Uwe Hermann
3def09d401 Rename sata_sii.c to satasii.c for consistency
Corresponding to flashrom svn r530.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2009-05-17 22:58:41 +00:00