You have to choose between
- no emulation
- ST M25P10.RES SPI flash chip (RES, page write)
- SST SST25VF040.REMS SPI flash chip (REMS, byte write)
- SST SST25VF032B SPI flash chip (RDID, AAI write)
Example usage: flashrom -p dummy:emulate=SST25VF032B
Flash image persistence is available as well.
Example usage: flashrom -p dummy:image=dummy_simulator.rom
Allow setting the max chunksize for page write with the dummy
programmer.
Example usage: flashrom -p dummy:spi_write_256_chunksize=5
Flash emulation is compiled in by default.
This code helped me find and fix various bugs in the SPI write code
as well as in the testsuite.
Corresponding to flashrom svn r1220.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: David Hendricks <dhendrix@google.com>
Replace "$flashrom_PARAM" with ${FLASHROM_PARAM} in
util/flashrom_partial_write_test.sh to avoid passing in quoted
parameters which can cause problems especially if flashrom_PARAM is
empty or contains spaces.
Corresponding to flashrom svn r1219.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Focus is on partial write and layout functionality.
Minor modifications by Carl-Daniel Hailfinger.
Corresponding to flashrom svn r1218.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The bug was invisible so far because we always started at offset 0. The
pending partial write patch uses nonzero start offsets and trips over
this bug.
Clarify a few comments in IT87 SPI.
Thanks to Idwer Vollering for reporting write breakage with my latest
partial write patch. This should fix the underlying problem.
Corresponding to flashrom svn r1217.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Previous probes might have had too short delays for entering ID mode,
so the chip may still be in the process of entering the ID mode. Due to
that, an additional delay before the reset makes sense.
Add FEATURE_RESET_MASK to deal cleanly with those feature bits.
Maciej Pijanka tested the patch and it fixes probing for him with some
old Atmel chips.
Corresponding to flashrom svn r1216.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Anders Juel Jensen <andersjjensen@gmail.com>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This will allow flashrom to skip erase of already-erased blocks and to
skip write of blocks which already have the wanted contents.
Avoid emergency messages by checking if the chip contents after a failed
write operation (erase/write) are unchanged.
Keep the emergency messages after a failed pure erase. That part is
debatable because if someone wants erase, he pretty sure doesn't care
about the flash contents anymore.
Please note that this introduces additional overhead of a full chip read
before write. This is frowned upon by people with slow programmers. A
followup patch will make this configurable.
Corresponding to flashrom svn r1215.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Details, lspci/superiotool/flashrom logs:
http://www.flashrom.org/pipermail/flashrom/2010-October/005160.html
Also add the vendor website URL for this board.
Corresponding to flashrom svn r1214.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Doit() is the monster function we split off from main() when we created
cli_classic() and tried to introduce some abstraction.
doit() is a poster child of WTFs on an astronomic scale.
Make doit() less bad by factoring out self-contained code.
Corresponding to flashrom svn r1212.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
The inner write functions which handle partial write are renamed to the
original name of their wrappers. The write wrappers are removed.
Corresponding to flashrom svn r1211.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Andrew Morgan <ziltro@ziltro.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Kill duplicated code.
Annotate write functions with their chunk size.
Mark Fujitsu MBM29F400BC and ST M29F400BB as untested because their
write code no longer uses a broken layout.
Corresponding to flashrom svn r1210.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
No behavioural changes, just equivalence transformations.
Corresponding to flashrom svn r1209.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The currently used write functions (wrappers) all use helpers which
perform the actual write (inner functions).
The signature of the write wrappers is: int write_chip(struct flashchip
*flash, uint8_t * buf);
The signature of the inner write functions varied a lot. This patch
changes them to: int write_part(struct flashchip *flash, uint8_t *src,
int start, int len);
Did you know that flashrom has only 8 inner write functions for all
flash chips? write_page_write_jedec_common write_sector_jedec_common
write_sector_28sf040 spi_chip_write_256_new spi_chip_write_1_new
spi_aai_write_new write_page_82802ab write_page_m29f400bt
Export all inner write functions.
Change the function signature of wait_82802ab to eliminate single-use
variables.
Remove an error message in write_page_m29f400bt which was printed for
every byte written regardless of success.
Add sharplhf00l04.c to the list of flash chip drivers in the Makefile.
While the functions in there are unused, I suspect we will need them
later, and by hooking the file up we ensure that compilation won't
break.
Corresponding to flashrom svn r1208.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Progress printing should be handled in the generic code, and will end up
there once partial write is possible.
Corresponding to flashrom svn r1207.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Flashrom had an implicit erase-on-write for most flash chip and
programmer drivers, but it was not entirely consistent.
Some drivers had their own hand-rolled partial update functionality
which made handling partial updates from generic code impossible.
Move implicit erase out of chip drivers, and kill some dead erase
functions at the same time. A full chip erase is now performed in the
generic code for all flash chips on write, and after that the whole chip
is written.
Corresponding to flashrom svn r1206.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
CONFIG_BITBANG_SPI was not selected if CONFIG_NICINTEL_SPI was on by default.
Wiki output was missing all flash chips if CONFIG_INTERNAL was not
selected.
Use correct type for toupper()/tolower()/isspace() functions.
Specify software requirements in a generic way.
Non-x86 compilation does not work with the default programmer set, so
list the make parameters which result in a working build.
Corresponding to flashrom svn r1203.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
A lot of messages sent@flashrom.org just have "flashrom -V" as the subject.
Ask people to include more information in the subject line to make life
easier for developers/supporters.
Corresponding to flashrom svn r1202.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
SPI write status register (WRSR) may take longer than 100 ms, and it
makes sense to poll for completion in 10 ms steps until 5 s are over.
This patch complements r1115.
Corresponding to flashrom svn r1201.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Joshua Roys <roysjosh@gmail.com>
Fix PCI device ID printing.
Remove personal e-mail addresses from the man page, point people to
flashrom@flashrom.org instead.
Corresponding to flashrom svn r1200.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Flashrom -L output did not contain a list of programmers nor were
all programmers listed. Fix it and mention at least the name of each
programmer. Wiki output is unchanged, and will need separate fixups.
Corresponding to flashrom svn r1199.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The Direct I/O library for Mac OS X is now called DirectHW to make sure
people can find it via an internet search.
DirectIO was a generic name for a concept and thus not a good
distinguisher for a library.
Corresponding to flashrom svn r1198.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Add a clarifying comment about why low memory is never unmapped.
Corresponding to flashrom svn r1195.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
Use AAI write for SST SST25VF032B.
Speedup from 228 to 113 seconds.
Use page (256 byte) write for SST SST25VF064C.
Speedup from 3091 to 123 seconds.
Corresponding to flashrom svn r1194.
Signed-off-by: Helge Wagner <helge.wagner@ge.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This also adds (and marks as tested) a chipset-enable for the SiS 741.
All operations successfully tested on hardware.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html
Corresponding to flashrom svn r1192.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Not sure if this is the final/correct fix, but for now it definately
fixes writes on FT2232H hardware. I have tested this on both, the
DLP Design DLP-USB1232H, and the openbiosprog-spi hardware.
Thanks to Joshua Roys <roysjosh@gmail.com> for the hint on IRC.
Corresponding to flashrom svn r1190.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Allow specification of an alternate base address with
flashrom -p rayer_spi:iobase=0x278
Any base address is allowed as long as it is nonzero, below 65536 and a
multiple of four.
Read speed is now on par with original spipgm.exe.
Corresponding to flashrom svn r1188.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Martin Rehak <rayer@seznam.cz>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Reported by Konstantin <hc@comp.susu.ac.ru>
lspci (superiotool missing, doesn't matter for this patch)
http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html
DMI is needed, as there are no usefull PCI IDs.
(no test of that board yet, thus marked as untested)
Corresponding to flashrom svn r1187.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Update README to list all the needed rpm files for DOS cross-compilation
and update the download location of cwsdpmi.
Corresponding to flashrom svn r1186.
Signed-off-by: Idwer Vollering <vidwer+flashrom@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This doesn't include changes to the frontend which must be
done separately, so this won't work out of the box.
This code was tested on hardware.
Corresponding to flashrom svn r1184.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Half a dozen hardcoded strcmp() don't make sense if we need a
chassis-type list anyway once we merge the internal DMI decoder. Provide
and array of the most interesting chassis types and annotate them with
laptop/non-laptop status. Match the dmidecode chassis type against the
strings in the array.
Corresponding to flashrom svn r1182.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Corresponding to flashrom svn r1181.
Change the physmap* behaviour to use (void*)-1 as error code instead
of NULL. That way, 1:1 mapped memory can be supported properly
because (void*)0 is not a magic pointer anymore.
(void*)-1 on the other hand is a rather unlikely memory offset, so that
should be safe.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The variable 'ret' is unused when compiling on big-endian architecture.
This produces an "unused variable" message, which might be treated as error
if -Werror was passed to compiler.
With this patch I was able to compile flashrom cleanly on ppc and ppc64:
http://koji.fedoraproject.org/koji/taskinfo?taskID=2472482http://koji.fedoraproject.org/koji/taskinfo?taskID=2472484
Corresponding to flashrom svn r1180.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Thanks to Johannes Sjölund for reporting that the Bus Pirate init could
not deal with a Bus Pirate which is already in binary Bitbang mode.
This is caused by a combination of the slowness of the Bus Pirate, the
slowness of USB and a fast serial port flush routine which just flushes
the buffer contents and does not wait until data arrival stops.
Make the Bus Pirate init more robust by running the flush command 10
times with 1.5 ms delay in between.
This code development was sponsored by Mattias Mattsson. Thanks! Tested
a few dozen times, should work reliably.
Corresponding to flashrom svn r1178.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mattias Mattsson <vitplister@gmail.com>
AMD SB700 and later have an integrated microcontroller (IMC) which runs
from shared flash.
The IMC will happily issue reads while we write, issue writes while we
read, and generally cause lots of havoc due to the concurrent accesses
it performs while flashrom is running. A failing or corrupted read can
be detected since r1145, and the worst case is that the read aborts and
the user has to retry. A failing write is much more serious. It can
be detected since r1145, but if the SPI interface locks up, we can't
continue writing nor can we read the current chip contents.
If the IMC is inactive, there is no reason to worry. If the IMC is
active, flashrom will refuse to erase/write the chip with this patch.
The correct fix would be to stop the IMC during flashing, but apparently
the relevant registers are undocumented, so we take the safe route for
now until someone from AMD can give us more info.
Corresponding to flashrom svn r1173.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Matthias Kretz <kretz@kde.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Some flash chips need time to exit ID mode, and while we take care of
correct timing for the matching probe, subsequent probes may have
totally different timing, and that can lead to garbage responses from
the flash chip during the first accesses after the probe sequence is
done.
Delay 100 ms between the last probe and any subsequent operation.
To ensure maximum correctness, we would have to reset the chip first in
case the last probe function left the chip in an undefined (non-read)
state. That will be possible once struct flashchip has a .reset
function.
This fixes unstable erase/read/write for some flahs chips on nic3com and
possible other use cases as well.
Thanks to Maciej Pijanka for reporting the issue and testing patches.
Corresponding to flashrom svn r1172.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
SPI bitbanging on devices which speak SPI natively has a dual-use
problem: We need to shut down normal SPI operations to do the bitbanging
ourselves. Once we're done, it makes a lot of sense to reenable "normal"
SPI operations again. Add request_bus/release_bus functions to struct
bitbang_spi_master.
Add a bitbang shutdown function (not used yet).
Change MCP SPI and Intel NIC SPI to use the new request/release bus
infrastructure.
Cosmetic changes to a few error messages (80 column limit).
There are multiple possible strategies for bus request/release:
- Request at the start of a SPI command, release immediately afterwards.
- Request at the start of a SPI multicommand, release once all commands
of the multicommand are done.
- Request on programmer init, release on shutdown.
Each strategy has its own advantages. For now, we will stay with the
first strategy which worked fine so far.
Corresponding to flashrom svn r1171.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
