P5N-E SLI, EP-8NPA7I and EP-9NPA7I all need at least this patch:
http://patchwork.coreboot.org/patch/2125/
the P5N-E also needs a board enable:
http://patchwork.coreboot.org/patch/3298/
mark the boards as not working until those are merged.
Corresponding to flashrom svn r1382.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r1369.
Signed-off-by: Benjamin Bellec <b.bellec@gmail.com>
with small changes:
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
http://patchwork.coreboot.org/patch/2893/
lspci: http://paste.flashrom.org/view.php?id=494
only writing a backup file was tested, so mark it as untested.
Corresponding to flashrom svn r1368.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested reading, writing and verification, all worked fine.
Corresponding to flashrom svn r1346.
Signed-off-by: Pawel Rozanski <rozie@poczta.onet.pl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- missing spaces in code and output
- improved documentation/naming/output
- missing line breaks in spi probing functions
Corresponding to flashrom svn r1321.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Without this the magic numbers need to be kept in sync with the maximum
length of the strings printed in the corresponding column. if not, an
overflow and a nasty ' '-storm occur on executing flashrom -L.
Corresponding to flashrom svn r1318.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This patch combines three previously posted patches in a revised form.
one is even stolen from Stefan Reinauer (remove umlauts from man page).
Corresponding to flashrom svn r1317.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This moves 99.5% of the .data section to .rodata (which ends up in .text).
Corresponding to flashrom svn r1293.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Simplify pcidev_init by killing the vendorid parameter which was pretty
useless anyway since it was present in the pcidevs parameter as well.
This also allows us to handle multiple programmers with different vendor
IDs in the same driver.
Fix compilation of flashrom with only the nicrealtek driver.
Corresponding to flashrom svn r1274.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Mark EVGA nForce 780i board as supported.
Full logs are here:
http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html
Corresponding to flashrom svn r1269.
Signed-off-by: Brandon Dowdy <brandonrd7@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Gigabyte is not really helpful with their PCI IDs for us, the subsystem
IDs used just mean "gigabyte northbridge" and "gigabyte southbridge".
We should investigate whether autodetection of this board is causing
interference with other boards.
real version 2: Extend list of PCI IDs for nvidia southbridges.
flashrom -V: http://paste.flashrom.org/view.php?id=326
lspic: http://paste.flashrom.org/view.php?id=328
superiotool: http://paste.flashrom.org/view.php?id=329
Corresponding to flashrom svn r1266.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
It uses a Marvell 88SX7042 SATA controller internally which has access
to a separate flash chip hosting the option ROM.
Thanks to Angelbird Ltd for sponsoring development of this driver!
I expect the code to work for that SATA controller even if it is not
part of the Angelbird SSD.
Corresponding to flashrom svn r1258.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This patch fixes wrong escaping of %.
In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+)
In board_enable.c %d is correct instead of \%d.
Corresponding to flashrom svn r1256.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
The project is in the the process of designing and making a complete,
open source, graphics card. More info at http://wiki.opengraphics.org.
The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
own flash and does not need to be programmed by flashrom - it ensures
that the device can enumerate on the PCI bus without needing further
configuration.
The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
smaller (128 KBytes). This patch adds support for programming either of
the two SPI flash chips.
The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).
Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested
for write.
Corresponding to flashrom svn r1241.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
I found this via educated guessing and trial-and-error.
Corresponding to flashrom svn r1239.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Details, lspci/superiotool/flashrom logs:
http://www.flashrom.org/pipermail/flashrom/2010-October/005160.html
Also add the vendor website URL for this board.
Corresponding to flashrom svn r1214.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix PCI device ID printing.
Remove personal e-mail addresses from the man page, point people to
flashrom@flashrom.org instead.
Corresponding to flashrom svn r1200.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Flashrom -L output did not contain a list of programmers nor were
all programmers listed. Fix it and mention at least the name of each
programmer. Wiki output is unchanged, and will need separate fixups.
Corresponding to flashrom svn r1199.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This also adds (and marks as tested) a chipset-enable for the SiS 741.
All operations successfully tested on hardware.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html
Corresponding to flashrom svn r1192.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Reported by Konstantin <hc@comp.susu.ac.ru>
lspci (superiotool missing, doesn't matter for this patch)
http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html
DMI is needed, as there are no usefull PCI IDs.
(no test of that board yet, thus marked as untested)
Corresponding to flashrom svn r1187.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The board-enable is the same as for the ASUS A7V8X, i.e., it raises
GP51 on the ITE IT8703F. I verified using a multimeter that this
will raise both, WE# and TBL# on the flash chip.
All operations successfully tested on hardware.
Also renamed board_asus_a7v8x() to it8703f_gpio51_raise().
Corresponding to flashrom svn r1167.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joshua Roys <roysjosh@gmail.com>
Corresponding to flashrom svn r1163.
Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,
while keeping bit 3 of register 0x23 set while manipulating the first
register.
AFAIK, there is no public datasheet available for this super i/o chip, but
the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem
to have the same meaning as on the ITE IT8710F.
Matching on NB/SB.
Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write
all work.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html
flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html
Many thanks to Reinder de Haan for help with reverse engineering this!
Corresponding to flashrom svn r1161.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Matching on NB/SB. Probe, read, erase and write all work.
lspci/superiotool output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html
I believe that this board enable also works for MSI BX Master (MS-6163
rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these
boards have not been tested.
Test logs for MS-6163 (rev:2):
http://www.flashrom.org/pipermail/flashrom/2010-September/004704.html
Corresponding to flashrom svn r1160.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
