54 Commits

Author	SHA1	Message	Date
Carl-Daniel Hailfinger	03adbe1269	Refine handling of spi_write_enable() failures to fix chip erases on ichspi ... Until the ICH SPI driver can handle preopcodes as standalone opcodes, we should handle such special opcode failure gracefully on ICH and compatible chipsets. This fixes chip erase on almost all ICH+VIA SPI masters. Thanks to Ali Nadalizadeh for helping track down this bug! Corresponding to flashrom svn r484. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>	2009-05-09 02:09:45 +00:00
Uwe Hermann	97e8f22b02	Fix typo ... Add missing copyright year. Corresponding to flashrom svn r428 and coreboot v2 svn r4107. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>	2009-04-13 21:35:49 +00:00
Jason Wang	13f98cefb7	Copyright update by Jason Wang for freshly written sb600 code ... Corresponding to flashrom svn r354 and coreboot v2 svn r3782. Signed-off-by: Jason Wang <Qingpei.wang@amd.com> Reviewed-by: Joe, Bao <Zheng.Bao@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>	2008-11-29 15:07:15 +00:00
Jason Wang	a3f04be761	Add support for the AMD/ATI SB600 southbridge SPI functionality ... This has been tested by Uwe Hermann on an RS690/SB600 board. Corresponding to flashrom svn r351 and coreboot v2 svn r3779. Signed-off-by: Jason Wang <Qingpei.Wang@amd.com> Reviewed-by: Joe Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>	2008-11-28 21:36:51 +00:00