Set -s (--strip-all) as STRIP_ARGS explicitly on all systems instead of
only on systems (SunOS / Solaris) where strip-all is not the default
behavior.
Change-Id: I2c80d553fb54d94bc65f07e700c90dd1bae4854e
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58246
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add a Nix shell file which is able to compile flashrom.
Change-Id: I9757b952f4b034e98c2b4b70fbede52d8efb9d50
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This allows programmer to register shutdown function in spi_master
struct, which means there is no need to call register_shutdown in init
function, since this call is now a part of register_spi_master.
As a consequence of using new API, two things are happening here:
1) No resource leakage anymore in case register_shutdown() would fail,
2) Fixed propagation of register_spi_master() return values.
BUG=b:185191942
TEST=test in CB:57918
(Nikolai) tested probe/read/write with a servo micro and puff board
Change-Id: I8927224779f24d1fda088991337e54d7272775a6
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57975
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch prepares the programmer to use new API which allows to
register shutdown function in spi_master struct. See also later
patch in this chain, where the programmer is converted to new API.
BUG=b:185191942
TEST=test in CB:57918
Change-Id: I567e24c9d39e24a4a1634ddcbdd05930760afcdc
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Spi data for this programmer now contains pointer to spi_master
struct, and can be used in configure_protocol.
This patch is making init code of raiden_debug_spi a bit more
consistent with other programmers, for example it allows to remove
data assignment `spi_config->data = data` from init function. This
assignment was only needed for configure_protocol function, and
now it is not needed anymore.
BUG=b:185191942
TEST=test in CB:57918
Change-Id: I5df0609efcd1fdb274b8cc84536253d5dbae5270
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
For this programmer, spi_master struct is dynamically allocated
and needs to be freed on shutdown. Adding a pointer to spi data
struct allows to link spi_master from spi data, which in turn allows
to pass spi data into shutdown function. As a result, both
register_spi_master and register_shutdown use the same data, and
this unblocks moving raiden_debug_spi to new API (like all the
other spi masters in commit a69c5196d20d136b1de120f0fa5ea1e06c3776da).
See further patches in this chain.
BUG=b:185191942
TEST=test in CB:57918
Change-Id: I5400802aa6961538df12fcd5339f7e2a5db145a1
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This reintroduces a reworked version of the GPIOL pin control first
introduced in commit 3207844 (CB:49637), which was reverted in commit
6518cf3 (CB:55692) due to breakage.
This change introduces a new argument `gpiolX` to allow use of the four
GPIOL pins either as generic gpios or as additional CS# signal(s). `X`
specifies the GPIOL pin (0-3) to be set to one of [HLC] with the
following meaning:
* H - set the pin as output high
* L - set the pin as output low
* C - use the pin as additional CS# signal
The third value, `C`, aims to replace the parameter `csgpiol`, that is
now marked as deprecated and can be removed at some point in the future.
`gpiol` and `csgpiol` are mutually exclusive and use of both results in
an error.
Multiple pins may be set by specifying the parameter multiple times.
Documentation was updated/added accordingly.
Test: All pin levels/modes have been verified to behave correctly with a
logic analyzer.
Change-Id: I3989f0f9596c090de52dca67183b1363dae59d3a
Signed-off-by: Alan Green <avg@google.com>
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This partially undoes changes made in commit cd9b7b427
(ich_descriptors: Normalize chipset detection) to re-add explicit
matching of each chipset with one or more strap length values.
Since ranges are checked explicitly, the `warn_if` parameter to
warn_peculiar_desc() is no longer necessary and is removed.
Change-Id: Ica49477492876810a6fa212768b1ab9e8c12001f
Signed-off-by: David Hendricks <ddaveh@amazon.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57793
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Documentation for `csgpiol` was put into the generic programmer options
section. Move it to its own section.
Change-Id: Ic7379331d36b3068eacde5a983b4ccb3afc56c51
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
On some programmers an output buffer needs to be enabled by pulling a
gpio high/low. This gpio can not be used for `csgpiol`. Prevent this by
printing an error.
Change-Id: Ied450fa5ef358153adefec3beabc63a62c9f60cd
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57809
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
As reported by Wolf Dieter Brandt in his e-mail from 09.Aug.2021.
Change-Id: I0c19f84780e7fa3699fd706f8e105fc5937ba8bf
Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This patch is doing few things:
1) Makes chip definitions static global so that they can be
reused between test functions.
2) Promotes existing mock chip from 8KiB to 8MiB and eraseblocks
are expanded accordingly. Old value of 8KiB was very small and it
was confusing. Mock chip looks more realistic now.
3) Uses KiB and MiB macros from flash.h for mock chip definition
4) Renames CHIP_TOTAL_SIZE to MOCK_CHIP_SIZE to avoid confusion
(there is also a W25Q128.V chip in the tests)
5) Makes chip definitions const so that every test can work on a
fresh copy on the stack.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: Ia9b5fc71e30610684e68e9aca9fb1970da8f840a
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Two tests cover the code which performs do_read operation.
First one works with fake chip and dummy programmer. Fake chip has all
operations defined, and a buffer to emulate chip memory.
Second one uses the chip which is closer to the real one, because
read/write/unlock/erase operations are real. The tests takes the
advantage of dummyflasher's capability of emulating a W25Q128.V chip.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: Ia57781ebc670c7bd6197e56fe8a20651a425c756
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Steps to setup and teardown for a chip test are repeated for every
test, so they can be extracted into their own functions.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: If59315646f06344664df08b145866d9ce846d751
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested on a 8086:1533 (i210 GbE), reads still return the same data.
This cuts the time to read a Winbond W25Q80.V (1 MiB, SPI) from 66
seconds down to 48 seconds, i.e. a 37.5% increase in speed.
Change-Id: I52a0ae5ff331ee2ed41652eb5c2ed7ebe7253d74
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This allows MinGW targets to use certain printf formatting
identifiers such as "%v" by adding -D__USE_MINGW_ANSI_STDIO=1 to
the CFLAGS. This is also done in flashrom's top-level Makefile.
Reported on https://github.com/flashrom/flashrom/issues/149
Change-Id: I644be8b5b607cc77b4be2121c443f0d41d8da687
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/43052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
register_spi_master now becomes the last operation in init function,
which is consistent with other spi masters.
In addition, the patch fixes propagation of register_spi_master return
values, which is also consistent with other spi masters.
TEST=ninja test
Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The #if defined(__i386__) || defined(__x86_64__) guard is commonly used
for x86 only code across flashrom.
Only platform.h and hwaccess.* use the IS_X86 macro.
Change-Id: I94a599431f58666189c8cd601286e9b30c8bf62b
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57942
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Let libusb_claim_interface() handle the kernel driver detaching for us
by allowing automatic kernel driver detachment. Allow this on all
platforms.
Change-Id: If6f19744503055ab8e22c863b31e696808e0407d
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Move all define statements in its own file to tidy up the main
Makefile.
Change-Id: I451f2eeab2773982e02b2f2fdc9e8abe1cc87630
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Handle system specific code in an own file like i2c_helper_linux.c.
The build system decides when to build it.
Change-Id: I0744e769dcc6000483e7256105903a87e927ee77
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
No symbol from platform.h is used in os.h
Change-Id: Ia8f463ab8f9f064fe79f5ee0840b851ae497a080
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57936
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The comment explaining gpio levels might be easily misunderstood when
the reader misses the word `output`. Add an explicit description of
handling of the GPIOL* pins to avoid that and make things even more
clear.
Change-Id: Iaceec889a65ead8cdde917f61b2a9695d440f781
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The build system handles the decision when to build a file.
Extra compile guards for the source files are not necessary.
Change-Id: I76a76e05c7a7dd27637325ab1e9d8946fd5f9076
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Best efforts were made to upstream older Chromebook support for good
intentions for folks interested. However, we no longer have the hardware
available to test and maintain the code as the hardware is now end of
life. Therefore the code state has sadly fallen into a unknown state.
BUG=none
BRANCH=none
TEST=builds and ninja test passes
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
The name of the struct type already contains dp_ prefix, so
prefix doesn't need to be repeated in members name.
BUG=b:185191942
TEST=builds and ninja test
Change-Id: I688d50926b78a6c3f1c5a8ba4ef88a0d5b495bd0
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Move global singleton states into a struct and store within
the spi_master data field for the life-time of the driver.
This is one of the steps on the way to move spi_master data
memory management behind the initialisation API, for more
context see other patches under the same topic "register_master_api".
BUG=b:185191942
TEST=builds and ninja test
Change-Id: I72085e750af97b94dfa94f2ebf2a134e41a2ec8d
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This patch does the following:
- Add PCIe ID for Intel Emmitsburg PCH
- Based on ICH descriptor content, choose CHIPSET_C620_SERIES_LEWISBURG
if ISL/PSL is 80.
TESTED=tried on a server with Intel Emmitsburg PCH, flash update
was successful. This server, however, does not have flash chip
installed, it instead has em100 emulator connected.
Change-Id: I2a1bb7467e693d1583aa885fa0e277075edd4a3e
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: David Hendricks <ddaveh@amazon.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54965
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Tim Chu <Tim.Chu@quantatw.com>
This patch adds an init-shutdown test for linux_mtd. Since
linux_mtd is using file i/o operations, those are added to the
framework and mocked.
Another driver linux_spi which is also using file i/o, got an upgrade
in this patch, and it is now reading max buffer size from sysfs (using
mocked file i/o).
A good side-effect is that linux_mtd is the first test for opaque
masters, which is great to have in preparation for a change like
CB:56103 but for opaque masters.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I73f0d6ff2ad5074add7a721ed3416230d3647e3f
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This patch checks return value of register_par_master()
so that in case of an error this error is not ignored anymore.
BUG=b:185191942
TEST=builds and ninja test
Change-Id: I377afae41708c7433a56615e2f096bce9c5349f1
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This allows par masters to register shutdown function in par_master
struct, which means there is no need to call register_shutdown in init
function, since this call is now a part of register_par_master.
As a consequence of using new API, this patch also fixes propagation
of register_par_master() return values.
BUG=b:185191942
TEST=builds and ninja test
Change-Id: Ief7be907f53878b4b6567b52889735e5fff64ead
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This patch prepares par masters to use new API which allows to
register shutdown function in par_master struct. See also later
patch in this chain, where par masters are converted to new API.
BUG=b:185191942
TEST=builds and ninja test
Comparing flashrom binary before and after the patch,
make clean && make CONFIG_EVERYTHING=yes VERSION=none
binary is the same
Change-Id: I87e9ce0ad9b39b39645dc24cb0d75d1e7a6d9047
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57155
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
With this, register_par_master can take care of register_shutdown
as well, and every par master only needs to call
register_par_master instead of calling both register_par_master
and register_shutdown.
Next patches in the chain convert par masters to use new API.
BUG=b:185191942
TEST=builds and ninja test
Change-Id: I0fee15d548cdd16678e551eeb351e659812ddf76
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57154
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
The PROGRAMFILES(X86) envvar contains brackets which
could not be interpreted by the Makefile's interpreter.
A sed based tweak have been added to extract the variable
value from the env command output. The prefixed include
and linker path with this (now correctly extracted) prefix
only added to the compilation flags if it differ from the
PROGRAMFILES variable.
Change-Id: I397619a5038567d649a417ce6b9d8ac9e1c8c67b
Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This allows spi masters to register shutdown function in spi_master
struct, which means there is no need to call register_shutdown in init
function, since this call is now a part of register_spi_master.
As a consequence of using new API, two things are happening here:
1) No resource leakage anymore in case register_shutdown() would fail,
2) Fixed propagation of register_spi_master() return values.
Basic testing: when I comment out free(data) in linux_spi_shutdown, test
fails with error
../linux_spi.c:235: note: block 0x55a4db276510 allocated here
ERROR: linux_spi_init_and_shutdown_test_success leaked 1 block(s)
Means, shutdown function is invoked.
BUG=b:185191942
TEST= 1) builds and ninja test including CB:56911
2) On ARMv7 device
flashrom -p linux_spi -V
-> using linux_spi, chip found
3) On x86_64 AMD device
flashrom -p internal -V
-> this is actually using sb600spi, chip found
Change-Id: Ib60300f9ddb295a255d5ef3f8da0e07064207140
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This allows opaque masters to register shutdown function in
opaque_master struct, which means there is no need to call
register_shutdown in init function, since this call is now a part
of register_opaque_master.
As a consequence of using new API, two things are happening here:
1) No resource leakage anymore in case register_shutdown() would fail,
2) Fixed propagation of register_opaque_master() return values.
BUG=b:185191942
TEST=1) builds and ninja test including CB:56413
2) on ARMv7 device
flashrom -p linux_mtd -V
-> using linux_mtd, chip found
Change-Id: Id8471a117556edcbf9694752fabe05cf4501ce70
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Just add the name to the existing entry, as usual it is supposed to be
compatible.
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: I14ab7e04f5209d2bcf34b0d2de9da2c01bf32d00
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56546
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
As defined by gigadevice. C, D and E are all meant to
be the same.
BUG=b:185957191
BRANCH=none
TEST=builds
Change-Id: I3bef9386a185a0e8c54c125af5509b63540995aa
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Two tests cover the code which performs do_erase operation.
First one works with fake chip and dummy programmer. Fake chip has all
operations defined, and a buffer to emulate chip memory.
Second one uses the chip which is closer to the real one, because
read/write/unlock/erase operations are real. The tests takes the
advantage of dummyflasher's capability of emulating a W25Q128.V chip.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I6f74bfe4e02244d24d6c837cc3d551251e7b4898
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56501
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
At the moment one test (spi25.c) uses wrap of spi_send_command, and
all other existing tests don't care about this function (don't call
it at all). However in the next patch a new test in introduced, which
needs a real spi_send_command.
Following the approach "don't mock unless it is strictly necessary",
all tests that don't care go into real function bucket.
A declaration for __real_spi_send_command is needed for visibility,
this way wrap function can redirect to real function for all other
tests except spi25.c.
Additionally, wrap function moves below mock_chip, so that mock_chip
is visible inside wrap.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I22945cce3d0f36adaa8032167a3ef4e54eccb611
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This can catch regressions like the earlier one in this programmer that
caused initialization to always fail. Requires support for mocking POSIX
file I/O functions because the programmer does ioctls on the opened
file.
TEST=ninja test
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I5a5c617d1ec35d2a3bbe622e5add82a65eb396f0
Reviewed-on: https://review.coreboot.org/c/flashrom/+/56911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
