The function intel_piix4_gpo_set includes proper gpo pin checking, and
gpo pin enables when necessary.
This is a leftover from soyo SY-6BA+III code that turned out to be
unnecessary, but still used for the epox ep-bx3 board enable which it
cleans up and clarifies.
Difference to old code:
* typical bios delay io port 0xEB now never gets touched.
* pci config byte 0xB0 was not altered before.
Corresponding to flashrom svn r803.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This is needed on NetBSD and probably other non-Linux platforms.
Corresponding to flashrom svn r802.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tighten up board id match table in preparation of upcoming matching
changes.
Some boards are deliberately broken so that we will receive reports
or can remove support later (for instance, for agami aruma, which,
probably is no longer available in the wild).
* Acorp 6A815EPD: make autodetectable.
* Agami Aruma: remove bogus subsystem ids. Due to lacking secondary
main id, this match will break soon.
* GIGABYTE GA-2761GXDK: Add secondary main id. Subsystem ids are not
possible as they are all copies of the main ids. Will still require
-m.
* GIGABYTE GA-M57SLI-S4: add full set of subsystem ids. Will keep
match name for coreboot name matching.
* GIGABYTE GA-M61P-S3: Add secondary main id. Remove name match.
Probably has good subsystem ids, but no info was found. So
deliberately broken match.
* GIGABYTE GA-MA790FX-DQ6: pointless name match.
* IBM x3455: add full ids, remove name match.
* Kontron 986LCD-M: remove full id match as it is bogus. Kontron is
an embedded vendor and does not bother with subsystem ids, so
make this board name match only.
* MSI MS-6590 (KT4 Ultra): remove name match.
* MSI MS-7135 (K8N Neo3): add full id set, keep name match for
coreboot.
* VIA EPIA-N/NL: remove name match.
* VIA PC3500G: remove name match.
Corresponding to flashrom svn r796.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Expands via vt823x gpio support to also accept gpio5.
Corresponding to flashrom svn r795.
Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca>
Acked-by: Luc Verhaegen <libv@skynet.be>
SiS630 chipset enable is equal to sis540 plus superio "poking".
Superio poking equals IT8705F flash write enable, which is currently
dealt with on a board by board basis in board_enable.c. Not all
630 and newer based boards come with it8705/sis950 superios.
Corresponding to flashrom svn r794.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Turns out that the AMD 8111 datasheet describes this bit of the MCP
perfectly.
Corresponding to flashrom svn r792.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
All AK31 versions, 1.x, 2.x and 3.x are supported by this board enable.
Sadly this board can not be autodetected.
Re-uses the epox ep 8k5a2 board enable, which now lost its check for
the VT8235 ISA bridge and got renamed to w836xx_memw_enable_2e.
Corresponding to flashrom svn r790.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
* Add autodetection and remove match strings.
* Make use of vt823x_set_all_writes_to_lpc.
Corresponding to flashrom svn r789.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Sean Nelson <audiohacked@gmail.com>
This code sets gpio lines on random intel ichs. Detects all currently
known intel ICHs, checks gpio lines, and then sets them accordingly.
Corresponding to flashrom svn r786.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Shuttle SFF PC is SN25P, board FN25, AMD socket 939 with an nForce4
chipset.
Config register 0x92 on the ISA bridge needs to be cleared for TBL#
to be raised. No information about individual bits of this register
is currently available.
Corresponding to flashrom svn r752.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Ulf Mehlig <ulf@ufpa.br>
- MSI MS-6153 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
- MSI MS-6156 (reported by Uwe Hermann <uwe@hermann-uwe.de>)
Tested by me on hardware. The board decodes max. 256 KB.
Also, fix Dell PowerEdge 1850 name and add some more board URLs.
Corresponding to flashrom svn r749.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
SocketA + nForce2 + MCP2.
Motherboard includes a second ethernet controller and an Agere
firewire controller with valid subsystem ids, so these are used for
matching the board.
Corresponding to flashrom svn r746.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Eddie Vanhove <moonraket@hotmail.com>
This patch reorganises the board_ga_k8n_sli to create
nvidia_mcp_gpio_raise, a more general routine to set these bits.
Without docs, i can only assume that these memory area are gpio
lines.
Then it becomes easy to add support for this nForce4 SLI board.
Corresponding to flashrom svn r745.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Martin Szulecki <opensuse@sukimashita.com>
This code has been tested.
Corresponding to flashrom svn r728.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
This is a followup to r705.
Corresponding to flashrom svn r707.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Raises GP32 on IT8712F, and comes with a more general routine to set
io lines on the IT8712F.
Corresponding to flashrom svn r705.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Udu Ogah <putlinuxonit@gmail.com>
Update bad board list and remove boards where either the chipset is
not supported (not a board issue) or where we have no report in the
archives.
Corresponding to flashrom svn r703.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Mark the following boards as OK (no board-enable needed):
- Tyan S2466 (reported by Oliver Niesner <oli@servebbs.net>)
http://www.flashrom.org/pipermail/flashrom/2009-August/000211.html
Mark the following boards as non-working for now:
- ASRock K7VT4A+ (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset detect, but no chip.
- ASUS M2N68 (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset detect, but no chip.
- ASUS A7V600-X (reported by Udu Ogah <putlinuxonit@gmail.com>)
Chipset and chip detected, writes don't work. Board-enable required.
Also, add some missing board URLs and fix incorrect board names.
Corresponding to flashrom svn r695.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This was forgotten in flashrom svn r677 where some handcrafted MSR accesses
were still found in board-specific code.
Corresponding to flashrom svn r683.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Raises what seems to be gpio21.
Uses host controller and Promise Raid Controller for a unique match.
Tested-by: Bojan Radakovic <crnibojan@gmail.com>
Corresponding to flashrom svn r682.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Flashrom tries to match these with board enable entries in its database.
If no such board enable entry exists because the board doesn't need one,
flashrom complains. Silence that complaint.
Corresponding to flashrom svn r668.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Slightly updated and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
This board is a VIA KM400 and VT8237 and IT8705F superio.
Corresponding to flashrom svn r655.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Scott Johnson <scott@gnuveau.net>
GP51 is attached to both WP# and TBL#.
Made possible by the quick response of ITE when asked for information,
and the tenacious testing of Glenn Mueller.
Corresponding to flashrom svn r652.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Glenn Mueller <mechwarrior5@hotmail.com>
- VIA EPIA-M700 (reported by Jakob Bornecrantz <wallbraker@gmail.com>)
http://www.coreboot.org/pipermail/coreboot/2009-July/050416.html
- GIGABYTE GA-EX58-UD4P (reported by Warren Turkal <wt@penguintechs.org>)
http://www.coreboot.org/pipermail/coreboot/2009-June/050199.html
Mark as non-working:
- ASUS Eee PC 701 4G (reported by Uwe Hermann <uwe@hermann-uwe.de>)
There seems to be some SPI flash translation layer, likey done by the
embedded controller on the laptop (ENE KB3310).
The BIOS chip in this Eee PC model is Winbond 25X40VSIG btw.
More info: http://beta.ivancover.com/wiki/index.php/Eee_PC_Research
Mark this chip as tested:
- ST M25P40 (reported by Jakob Bornecrantz <wallbraker@gmail.com>)
http://www.coreboot.org/pipermail/coreboot/2009-July/050416.html
Other:
- Make the "Albatron PM266A" board detection print "Albatron PM266A*" as this
enable will actually work for other PM266A* boards according to libv.
However, the code was actually tested on "Albatron PM266A Pro".
- Add some more board URLs / notes.
- s/BioStar/Biostar/ as per vendor website.
- Fix typo in print.c: s/A7V8-MX SE/A7V8X-MX SE/.
Corresponding to flashrom svn r639.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- Properly escape '-' chars in manpage.
- Fix typo in chipset_enable.c.
- Drop useless 'return' in chip_readn().
- Random other whitespace or cosmetic fixes.
Corresponding to flashrom svn r636.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- ASUS P5KC (reported by Andrei Pavlov <pavlov.andrei@rambler.ru>)
- GIGABYTE GA-EP35-DS3L (reported by Alexander Gordeev <lasaine@lvk.cs.msu.su>)
Add a few more URLs.
Corresponding to flashrom svn r627.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Turns out that the GIGABYTE GA-7ZM _does_ work fine if you disable
the BIOS flash protection option _and_ remove jumper JP9 on the board
(d'oh!).
This board can decode 512 KB chips just fine (not just 256 KB).
Corresponding to flashrom svn r618.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The board can decode 256 KB only (i.e., not 512 KB) it seems.
Corresponding to flashrom svn r617.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
FYI, this board can only decode 256 KB chips (not 512 KB ones) unfortunately.
The highest address line (A18) is not connected on this board.
The it8705f_write_enable() is kept generic enough so it can be reused for other
board-enables, possibly in the board_biostar_p4m80_m4() for example, but that
shouldn't be touched for now, unless someone can test the code.
Corresponding to flashrom svn r616.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
- Convert #defines for strings in print.c to 'const char *'s.
- Add missing entries in the board URL tables.
- Add a few more board URLs, partly contributed by 'Alien' at
http://www.coreboot.org/index.php?title=flashrom&curid=1765&diff=8626&oldid=8625&rcid=3586
- Fix sort order of board lists.
- Add laptops to URL list (not yet used).
- Fix typo.
- Fix EPIA-EX15000/NX15000 names (append "G").
Corresponding to flashrom svn r614.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Thanks Clark Rawlins <clark@bit63.org> for the report!
Corresponding to flashrom svn r612.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
ATX board for P3; Intel 82810e GMCHe, Intel 82801AA ICH and SMSC
LPC47U332 super I/O.
Corresponding to flashrom svn r609.
Signed-off-by: Michael Gold <mgold@ncf.ca>
Acked-by: Luc Verhaegen <libv@skynet.be>
Mark as OK:
- ASRock A770CrossFire (reported by RIVANVX on IRC, no email available).
User verified read and write with -wv, which VERIFIED OK.
Mark as non-working for now:
- HP/Compaq nx9010 (laptop, reported by Murawski Mateusz <matowy@tlen.pl>).
Hangs upon 'flashrom -V' (needs hard power-cycle then).
- Elitegroup K7VTA3 (reported by Uwe Hermann <uwe@hermann-uwe.de>).
Needs board-enable.
- GIGABYTE GA-7ZM (reported by Uwe Hermann <uwe@hermann-uwe.de>).
Needs board-enable.
Corresponding to flashrom svn r605.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Content taken from current wiki page.
Corresponding to flashrom svn r604.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Drop no longer needed MAX macro, we have a max() function.
Corresponding to flashrom svn r601.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Also, list how many chips/chipsets/boards we support in 'flashrom -L'.
Corresponding to flashrom svn r599.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
There are multiple albatron pm266a boards which all share the same bios
image. This means that both the board enable and the subsystem ids are
exactly the same.
The board enable is the same as the epox EP-8K5A2, namely only raising
memw on the superio.
Corresponding to flashrom svn r581.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
I finally found the machine (doesn't belong to me) where I originally tested
this board as non-working and I can confirm that all operations work fine now
(since the nForce2 patch in r548).
Corresponding to flashrom svn r571.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Raises bits 0 and 2 on offset 0xE1 in the system control area of the
nvidia ck804 lpc.
Corresponding to flashrom svn r568.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Alexander Gordeev <lasaine@lvk.cs.msu.su>
