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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-26 22:52:34 +02:00

8 Commits

Author SHA1 Message Date
Patrick Georgi
32508eb304 Hide hwaccess.h from public API
Move hwaccess.h #include from flash.h to individual drivers.
libflashrom users need flash.h, but they do not care about hwaccess.h
and should not see its definitions because they may conflict with
other hardware access functions and #defines used by the libflashrom
user.

Corresponding to flashrom svn r1549.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2012-07-20 20:35:14 +00:00
Carl-Daniel Hailfinger
c40cff7b86 Have all programmer init functions register bus masters/programmers
All programmer types (Parallel, SPI, Opaque) now register themselves
into a generic programmer list and probing is now programmer-centric
instead of chip-centric.
Registering multiple SPI/... masters at the same time is now possible
without any problems. Handling multiple flash chips is still unchanged,
but now we have the infrastructure to deal with "dual BIOS" and "one
flash behind southbridge and one flash behind EC" sanely.

A nice side effect is that this patch kills quite a few global variables
and improves the situation for libflashrom.

Hint for developers:
struct {spi,par,opaque}_programmer now have a void *data pointer to
store any additional programmer-specific data, e.g. hardware
configuration info.

Note:
flashrom -f -c FOO -r forced_read.bin
does not work anymore. We have to find an architecturally clean way to
solve this.

Corresponding to flashrom svn r1475.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
2011-12-20 00:19:29 +00:00
Michael Karcher
b9dbe48b77 Kill central list of SPI programmers
Remove the array spi_programmer, replace it by dynamic registration
instead. Also initially start with no busses supported, and switch to
the default non-SPI only for the internal programmer.

Also this patch changes the initialization for the buses_supported variable
from "everything-except-SPI" to "nothing". All programmers have to set the
bus type on their own, and this enables register_spi_programmer to just add
the SPI both for on-board SPI interfaces (where the internal programmer
already detected the other bus types), as well as for external programmers
(where we have the default "none").

Corresponding to flashrom svn r1299.

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2011-05-11 17:07:07 +00:00
Stefan Reinauer
18430a08aa Remove duplicate includes from the code
Corresponding to flashrom svn r1196.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
2010-10-06 02:56:44 +00:00
Carl-Daniel Hailfinger
2822888c81 SPI bitbanging: request/release bus
SPI bitbanging on devices which speak SPI natively has a dual-use
problem: We need to shut down normal SPI operations to do the bitbanging
ourselves. Once we're done, it makes a lot of sense to reenable "normal"
SPI operations again. Add request_bus/release_bus functions to struct
bitbang_spi_master.
Add a bitbang shutdown function (not used yet).
Change MCP SPI and Intel NIC SPI to use the new request/release bus
infrastructure.
Cosmetic changes to a few error messages (80 column limit).

There are multiple possible strategies for bus request/release:
- Request at the start of a SPI command, release immediately afterwards.
- Request at the start of a SPI multicommand, release once all commands
of the multicommand are done.
- Request on programmer init, release on shutdown.
Each strategy has its own advantages. For now, we will stay with the
first strategy which worked fine so far.

Corresponding to flashrom svn r1171.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2010-09-15 00:17:37 +00:00
Carl-Daniel Hailfinger
7b61df80fb Use caching for Nvidia MCP SPI GPIO accesses
Reduce clock delay to zero.

Tests show more than 2x speedup.

Corresponding to flashrom svn r1164.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2010-09-14 01:29:49 +00:00
Uwe Hermann
48ec1b17d8 Various cosmetic and coding-style fixes
- Fix incorrect whitespace, indentation, and coding style in some places.

 - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use
   it, the comments are useless as we don't have any Doxygen markup in there.

 - Use consistent vendor name spelling as per current website (NVIDIA,
   abit, GIGABYTE).

 - Use consistent / common format for "Suited for:" lines in board_enable.c.

 - Add some missing 'void's in functions taking no arguments.

 - Add missing fullstops in sentences, remove them from non-sentences (lists).

Corresponding to flashrom svn r1134.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2010-08-08 17:01:18 +00:00
Carl-Daniel Hailfinger
2f43616873 Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing support
Huge thanks go to Michael Karcher for reverse engineering the interface
and to Johannes Sjölund for testing the first iterations of my patch on
his hardware until it worked.

Thanks to the following testers of the patch:
* MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland
* MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
* MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt
* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson"

flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x
SPI is detected.

Corresponding to flashrom svn r1113.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
2010-07-28 15:08:35 +00:00