Thanks Myles Watson <mylesgw@gmail.com> for the report.
Corresponding to flashrom svn r532.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
- Supported out of the box (no flash enables required)
- Verifiably not yet working (unknown flash enable)
Also, move some structs to flash.h in preparation for later wiki
output support.
Corresponding to flashrom svn r523.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Build-tested on 32bit x86.
Corresponding to flashrom svn r521.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This will allow generation of supported boards for wiki output to be
split to distinct columns.
Corresponding to flashrom svn r482.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This is (among other things) useful/required for the -L output and the
upcoming wiki-syntax output of supported boards.
Corresponding to flashrom svn r474.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This patch restores the pciid based board matching table. It makes this
table readable and hackable again, and the only disadvantage is that the
right margin is way beyond the rather dogmatic 80. All 0x0000 pci ids have
been string replaced by 0 to more easily spot missing ids, and extra
comments have been added to explain how the various entries are used.
Corresponding to flashrom svn r434 and coreboot v2 svn r4142.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>
It has SPI flash behind ITE8716 on LPC.
Corresponding to flashrom svn r430 and coreboot v2 svn r4132.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: illdred <illdred@gmail.com>
Tested on an iWILL DK8-HTX board.
Corresponding to flashrom svn r424 and coreboot v2 svn r4086.
Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
This is a BCM5785 based machine, WP# and TLB# need to be deasserted using
GPIO 2 and 5 from the PM registers of the southbridge.
This is very similar to the x3455 implementation.
Corresponding to flashrom svn r423 and coreboot v2 svn r4031.
Signed-off-by: Mondrian Nuessle <nuessle@uni-hd.de>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r414 and coreboot v2 svn r3927.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: David Tiemann <davidtiemann@gmail.com>
Similarly to flashchips array, this patch intends to make the table board_pciid_enables more readable.
Corresponding to flashrom svn r382 and coreboot v2 svn r3861.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
> What real problem does this solve?
1. Next time someone adds a new struct member, we avoid mistakes of
ordering of initializers
2. we avoid mistakes in the first place.
The .x = y stuff was added for a (good) reason, I think this is an
improvement.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge.
The board uses GIGABYTE's patented BIOS failover technology, and at this point
we do not know how to control which of the two chips flashrom actually hits.
Corresponding to flashrom svn r380 and coreboot v2 svn r3859.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
There seem to be at least two versions of the board out there, and the
subsystem IDs changed between the versions.
Patch successfully tested on hardware.
Corresponding to flashrom svn r369 and coreboot v2 svn r3833.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Corresponding to flashrom svn r326 and coreboot v2 svn r3669.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
The KT4V is autodetected and supports the KT3 Ultra 2 with "-m msi:kt4v"
(but is not autodetected, yet).
Corresponding to flashrom svn r309 and coreboot v2 svn r3528.
Signed-off-by: Sean Nelson <snelson@nmt.edu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
W39V040C does standard JEDEC commands except chip erase so add a small driver.
probe_w39v040c() prints the block lock pin status when a chip is found.
The Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs.
Many thanks to Daniel McLellan for testing all of this on hardware!
Build tested by Uwe.
Corresponding to flashrom svn r304 and coreboot v2 svn r3431.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Uses the 0.0 Host bridge CN700/VN800/P4M800CE/Pro and 11.0 ISA bridge devices
with their 1106:aa08 subsystem id:s for autodetection.
Corresponding to flashrom svn r297 and coreboot v2 svn r3413.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Thanks to Stefan for pointing this one out.
Corresponding to flashrom svn r287 and coreboot v2 svn r3403.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Needed at least for GIGABYTE:m57sli in coreboot to match gigabyte:m57sli in
flashrom.
Corresponding to flashrom svn r286 and coreboot v2 svn r3402.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Uses the VT8237 ISA bridge with mainboard subsystem ID and Realtek 8139 with
mainboard subsystem ID for board detection.
Corresponding to flashrom svn r258 and coreboot v2 svn r3366.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
Thanks to Reinder for clean room reverse engineering and data sheet diving!
This board is autodetected because there are some good BioStar subsystem IDs.
Matching uses onboard VT6420 SATA RAID with subsystem BioStar 3206 and
onboard UniChrome Pro IGP graphics with subsystem BioStar 1202.
Corresponding to flashrom svn r256 and coreboot v2 svn r3364.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
- Fix typos and inconsistencies.
- Drop duplicate line which tells us the chip name twice.
- Also print the chip vendor, not only the name.
Corresponding to flashrom svn r249 and coreboot v2 svn r3348.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested on actual hardware.
This patch add an ich_gpio_raise() function which can be re-used by other
board-specific funtions which need to raise GPIOs on ICHx southbridges.
This also fixes bug #7, see http://tracker.coreboot.org/trac/coreboot/ticket/7,
as it turned out the ICH2 (and other ICHx) code works fine.
Corresponding to flashrom svn r247 and coreboot v2 svn r3346.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Corresponding to flashrom svn r245 and coreboot v2 svn r3344.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Support for flashing on the Kontron 986LCD-M board.
Corresponding to flashrom svn r213 and coreboot v2 svn r3165.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Corresponding to flashrom svn r202 and coreboot v2 svn r3138.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Also add a comment about NULL subsystem IDs leaving the board entry out
of auto-detection logic.
Corresponding to flashrom svn r197 and coreboot v2 svn r3110.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
The full syntax still works, and is required when two vendors have
boards with the same names.
Corresponding to flashrom svn r190 and coreboot v2 svn r3082.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r178 and coreboot v2 svn r3054.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r174 and coreboot v2 svn r3033.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per
http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html
Corresponding to flashrom svn r162 and coreboot v2 svn r2997.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r161 and coreboot v2 svn r2995.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r151 and coreboot v2 svn r2873.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Corresponding to flashrom svn r148 and coreboot v2 svn r2864.
Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The SPI chip finding and SPI chip accessor code is moved as well. This
can be split later if we feel like it.
The non-use of svn cp is intentional because the only history we'd
have to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.
Corresponding to flashrom svn r145 and coreboot v2 svn r2857.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Also minor changes to remove tab-space combinations where possible.
Corresponding to flashrom svn r144 and coreboot v2 svn r2850.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
It introduces a generic SPI host driver for the IT8716F Super I/O
which will enable easy SPI programming without having to care for the
peculiarities of the SPI host.
To activate probing for the IT8716F, you have to use the gigabyte:m57sli
mainboard override. SPI support will then use the gathered SPI host data
to access the SPI flash.
This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the
GA-M57SLI v2.0, which has a MX25L4005 SPI flash part.
Corresponding to flashrom svn r140 and coreboot v2 svn r2817.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
Right now this is hardcoded to the Gigabyte M57SLI board. It works only
with rev 2.0 of the board, but it will bail out on earlier versions, so
no damage can occur.
Corresponding to flashrom svn r139 and coreboot v2 svn r2811.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
No changes in content of the files.
Corresponding to flashrom svn r131 and coreboot v2 svn r2751.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r130 and coreboot v2 svn r2748.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Corresponding to flashrom svn r128 and coreboot v2 svn r2746.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
