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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 23:43:42 +02:00

6 Commits

Author SHA1 Message Date
Angel Pons
cbe8a39ece lspcon_i2c_spi.c: Rename PAGE_SIZE macro
This fixes building with musl libc on alpine:i386-v3.7.

Change-Id: Ibd478f3fcd6b6803098035dbdc47f72f6ab3fa6b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-04-19 05:36:30 +00:00
Shiyu Sun
7f87f9fdc2 lspcon_i2c_spi.c: Prefix with fn name instead of just 'Error:'
Replace log lines with the prefix formatter '%s: ..' and pass
'__func__' to the printers so that errors are prefixed with the
function from which they originated.

BUG=b:154285774
BRANCH=none
TEST=build success

Change-Id: If3205d8e453cfcd37f725b4fd135fe1221c913c0
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40901
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 00:57:19 +00:00
Edward O'Callaghan
e4ddc36371 const'ify flashctx to align signatures with cros flashrom
The ChromiumOS flashrom fork has since const'ify flashctx
in a few places. This aligns the function signatures to
match with downstream to ease forward porting patches
out of downstream back into mainline flashrom.

This patch is minimum viable alignment and so feedback is
welcome.

Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-30 08:00:41 +00:00
Edward O'Callaghan
94991d83e4 lspcon_i2c_spi.c: Trivial style fix
Change-Id: I0675b467d7b0d24626a336033668bf80bfeeb815
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-24 11:52:59 +00:00
Edward O'Callaghan
a25c13cdb6 lspcon_i2c_spi.c: Clean up some unnecessary indirection
Clean up some confusion of implicit copies by indirection.
This allows the caller of register_spi_master() to have it's
internal state in the expected way.

Also add an error when the mpu reset fails on init.

BUG=b:148746232,b:153027771,b:140394053
BRANCH=none
TEST=builds

Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Change-Id: I66ba4ffeb696309b8ad5b5ba58650630e8feefa9
Reviewed-on: https://review.coreboot.org/c/flashrom/+/40470
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-19 12:17:54 +00:00
Shiyu Sun
13a2ef6cbd lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}
This adds support for the Parade lspcon usb-c to HDMI protocol
translater part that is i2c-controlled. The support allows the
host to reach the SPI ROM that hangs off the part where it
stores its firmware.

Usage is as follows:
	flashrom -p lspcon_i2c_spi:bus=X
	where X is the bus number.

BUG=b:148746232
BRANCH=none
TEST=tested with following commands, read/write/erase works good.
	flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo;
	flashrom -p lspcon_i2c_spi:bus=7 -E;
	flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo;

Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-04-01 06:34:16 +00:00