This moves 99.5% of the .data section to .rodata (which ends up in .text).
Corresponding to flashrom svn r1293.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Simplify pcidev_init by killing the vendorid parameter which was pretty
useless anyway since it was present in the pcidevs parameter as well.
This also allows us to handle multiple programmers with different vendor
IDs in the same driver.
Fix compilation of flashrom with only the nicrealtek driver.
Corresponding to flashrom svn r1274.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Mark EVGA nForce 780i board as supported.
Full logs are here:
http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html
Corresponding to flashrom svn r1269.
Signed-off-by: Brandon Dowdy <brandonrd7@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Gigabyte is not really helpful with their PCI IDs for us, the subsystem
IDs used just mean "gigabyte northbridge" and "gigabyte southbridge".
We should investigate whether autodetection of this board is causing
interference with other boards.
real version 2: Extend list of PCI IDs for nvidia southbridges.
flashrom -V: http://paste.flashrom.org/view.php?id=326
lspic: http://paste.flashrom.org/view.php?id=328
superiotool: http://paste.flashrom.org/view.php?id=329
Corresponding to flashrom svn r1266.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
It uses a Marvell 88SX7042 SATA controller internally which has access
to a separate flash chip hosting the option ROM.
Thanks to Angelbird Ltd for sponsoring development of this driver!
I expect the code to work for that SATA controller even if it is not
part of the Angelbird SSD.
Corresponding to flashrom svn r1258.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This patch fixes wrong escaping of %.
In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+)
In board_enable.c %d is correct instead of \%d.
Corresponding to flashrom svn r1256.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
The project is in the the process of designing and making a complete,
open source, graphics card. More info at http://wiki.opengraphics.org.
The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
own flash and does not need to be programmed by flashrom - it ensures
that the device can enumerate on the PCI bus without needing further
configuration.
The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
smaller (128 KBytes). This patch adds support for programming either of
the two SPI flash chips.
The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).
Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested
for write.
Corresponding to flashrom svn r1241.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
I found this via educated guessing and trial-and-error.
Corresponding to flashrom svn r1239.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Details, lspci/superiotool/flashrom logs:
http://www.flashrom.org/pipermail/flashrom/2010-October/005160.html
Also add the vendor website URL for this board.
Corresponding to flashrom svn r1214.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Fix PCI device ID printing.
Remove personal e-mail addresses from the man page, point people to
flashrom@flashrom.org instead.
Corresponding to flashrom svn r1200.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Flashrom -L output did not contain a list of programmers nor were
all programmers listed. Fix it and mention at least the name of each
programmer. Wiki output is unchanged, and will need separate fixups.
Corresponding to flashrom svn r1199.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This also adds (and marks as tested) a chipset-enable for the SiS 741.
All operations successfully tested on hardware.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html
Corresponding to flashrom svn r1192.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Reported by Konstantin <hc@comp.susu.ac.ru>
lspci (superiotool missing, doesn't matter for this patch)
http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html
DMI is needed, as there are no usefull PCI IDs.
(no test of that board yet, thus marked as untested)
Corresponding to flashrom svn r1187.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
The board-enable is the same as for the ASUS A7V8X, i.e., it raises
GP51 on the ITE IT8703F. I verified using a multimeter that this
will raise both, WE# and TBL# on the flash chip.
All operations successfully tested on hardware.
Also renamed board_asus_a7v8x() to it8703f_gpio51_raise().
Corresponding to flashrom svn r1167.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joshua Roys <roysjosh@gmail.com>
Corresponding to flashrom svn r1163.
Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,
while keeping bit 3 of register 0x23 set while manipulating the first
register.
AFAIK, there is no public datasheet available for this super i/o chip, but
the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem
to have the same meaning as on the ITE IT8710F.
Matching on NB/SB.
Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write
all work.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html
flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html
Many thanks to Reinder de Haan for help with reverse engineering this!
Corresponding to flashrom svn r1161.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Matching on NB/SB. Probe, read, erase and write all work.
lspci/superiotool output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html
I believe that this board enable also works for MSI BX Master (MS-6163
rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these
boards have not been tested.
Test logs for MS-6163 (rev:2):
http://www.flashrom.org/pipermail/flashrom/2010-September/004704.html
Corresponding to flashrom svn r1160.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Match on SMBus and Audio.
lspci/superiotool/flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-September/004689.html
Corresponding to flashrom svn r1159.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Tested-by: Alexander Mikhnovets <alexander.mikhnovets@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read,
erase and write all work.
Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset
as tested.
lspci/superiotool:
http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html
Corresponding to flashrom svn r1158.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004436.html
This goes the safe route of adding a match for the P4P800 that does not
match the P4P800-E Deluxe which is already in. It seems quite likely that
the whole P4P800 family could use the same board enable with one generic
board enable match, though.
This match uses host bridge + audio, because all other IDs match the
P4P800-E Deluxe board, as reported in
http://www.e-monkeys.de/Everest-Bericht.txt
(no user feedback, commit as "untested")
Corresponding to flashrom svn r1157.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004539.html
matching SMBus + Audio, because SMBus is the only core device with
usable IDs.
Corresponding to flashrom svn r1156.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Marked as untested for now, as there was no response from the user.
Corresponding to flashrom svn r1155.
Signed-off-by: Sergey A Lichack <shadowpilot34@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware.
The last line in nicintel_request_spibus() could be changed so that FL_BUSY
is used instead.
Shortened sample log:
[...]
Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).
Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.
Multiple flash chips were detected: M25P05.RES M25P10.RES
Please specify which chip to use with the -c <chipname> option.
[...]
Corresponding to flashrom svn r1151.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Many thanks to Michael Karcher for reverse engineering this.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html
Corresponding to flashrom svn r1146.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
- There are number of boards that have board-enables in board-enable.c but
have no corresponding entry in print.c (with or without URL doesn't matter)
and thus appear neither in the "flashrom -L" list of boards nor in the
wiki output. Fix this by adding entries for them in print.c.
- abit AN-M2
- abit KN8 Ultra
- ASUS A8Jm (laptop)
- ASUS A8N (might need changing to "A8N-SLI Deluxe", see
http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html)
- ASUS A8N-LA (Nagami-GL8E)
- ASUS P4B533-E
- ASUS P4S800-MX
- HP ProLiant DL165 G6
- IBASE MB899
- Intel SE440BX-2 (marked as non-working for now though, due to
http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html)
- MSI MS-6577 (Xenon)
- MSI MS-7207 (K8NGM2-L)
- Fix / amend a few board names:
- Add "ProLiant" name to the "DL145 G3" (and the new "DL165 G6"), we
use such "series" names for various other boards (e.g. "Vectra" etc)
and it also helps users googling for those names.
- HP "Vectra VL400 PC" should be "Vectra VL400" really, I'm pretty sure
the "PC" is not part of the board name but simply stands for
"personal computer". Same for "Vectra VL420 SFF PC".
- Change "ASUS A8JM" to "ASUS A8Jm" as per vendor website.
- Add comments for boards which may be listed with incorrect names,
I sent out clarification requests to the list, URLs listed as comment.
- Add "Xenon" HP name to the "MSI MS-6577" OEM board.
- Fix typo in "MS-7207 (K8N GM2-L)", should be "MS-7207 (K8NGM2-L)" as
per vendor website.
Corresponding to flashrom svn r1141.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004414.html
(URL added by Michael Karcher)
Corresponding to flashrom svn r1139.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
I had to use the USB controller in the board enable because all other
subsystem IDs are having vendor: Gigabyte but mostly copy the Intel
product IDs.
lspci/superiotool:
http://www.coreboot.org/pipermail/flashrom/2010-August/004420.html
Corresponding to flashrom svn r1138.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Thomas Kalka <thomas.kalka@googlemail.com>
- Fix incorrect whitespace, indentation, and coding style in some places.
- Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use
it, the comments are useless as we don't have any Doxygen markup in there.
- Use consistent vendor name spelling as per current website (NVIDIA,
abit, GIGABYTE).
- Use consistent / common format for "Suited for:" lines in board_enable.c.
- Add some missing 'void's in functions taking no arguments.
- Add missing fullstops in sentences, remove them from non-sentences (lists).
Corresponding to flashrom svn r1134.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This was successfully tested by 'kai2343' on IRC.
Thanks to Michael Karcher for finding the board enable.
Corresponding to flashrom svn r1133.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Add support for the Amontec JTAGkey2, see
http://www.amontec.com/jtagkey2.shtmlhttp://www.amontec.com/jtagkey.shtml.
This FTDI 2232H variant has an additional output enable, which will be
set to its "on" (L) when CS is pulled low. But it lacks a power supply
and you need an external 3.3V source.
The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It
should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I
only have a JTAGkey2 here for testing.
Add all FT2232H/FT4232H based programmers to the list printed with
flashrom -L
Corresponding to flashrom svn r1119.
Signed-off-by: Jörg Fischer <turboj@gmx.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
