mirror of
https://review.coreboot.org/flashrom.git
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d07cd9f515
To make the flashchips "database" easier to manage, split it by vendor into several smaller files. This commit transfers the bulk of the data to separate files and includes them from `flashchips.c`. Although this is ugly (.c includes are usually frowned upon), it is a necessary evil to make this commit reproducible. Tested in two ways: 1) Output of `flashrom -L` has no diffs with/without the patch compared with diff and cmp tools 2) flashrom binary has no diffs with/without the patch compared with diff and cmp tools Note for binary comparison documentation and manpages need to be disabled (documentation is actually modified in the patch), also version in meson.build set to "none" (otherwise git version counts every commit). Change-Id: I3a9ebb0575e2700c5871d16875495d9c8943b30b Co-developed-by: Angel Pons <th3fanbus@gmail.com> Co-developed-by: Anastasia Klimchuk <aklm@flashrom.org> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/83307 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
518 lines
14 KiB
C
518 lines
14 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2004 Tyan Corp
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* Copyright (C) 2005-2008 coresystems GmbH <stepan@openbios.org>
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* Copyright (C) 2006-2009 Carl-Daniel Hailfinger
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* Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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{
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.vendor = "Intel",
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.name = "25F160S33B8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F160S33B8,
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.total_size = 2048,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{8 * 1024, 8},
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{64 * 1024, 31} // inaccessible
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 32} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {2 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "25F160S33T8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F160S33T8,
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.total_size = 2048,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{64 * 1024, 31}, // inaccessible
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{8 * 1024, 8}
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 32} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {2 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "25F320S33B8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F320S33B8,
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.total_size = 4096,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{8 * 1024, 8},
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{64 * 1024, 63} // inaccessible
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 64} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {4 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "25F320S33T8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F320S33T8,
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.total_size = 4096,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{64 * 1024, 63}, // inaccessible
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{8 * 1024, 8}
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 64} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {4 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "25F640S33B8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F640S33B8,
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.total_size = 8192,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_OK_PREW,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{8 * 1024, 8},
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{64 * 1024, 127} // inaccessible
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 128} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "25F640S33T8",
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.bustype = BUS_SPI,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_25F640S33T8,
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.total_size = 8192,
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.page_size = 256,
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/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
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.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
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.tested = TEST_UNTESTED,
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.probe = PROBE_SPI_RDID,
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.probe_timing = TIMING_ZERO,
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.block_erasers =
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{
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{
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/* This chip supports erasing of the 8 so-called "parameter blocks" with
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* opcode 0x40. Trying to access an address outside these 8 8kB blocks does
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* have no effect on the memory contents, but sets a flag in the SR.
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.eraseblocks = {
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{64 * 1024, 127}, // inaccessible
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{8 * 1024, 8}
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},
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.block_erase = SPI_BLOCK_ERASE_40,
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}, { */
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.eraseblocks = { {64 * 1024, 128} },
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.block_erase = SPI_BLOCK_ERASE_D8,
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}, {
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.eraseblocks = { {8 * 1024 * 1024, 1} },
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.block_erase = SPI_BLOCK_ERASE_C7,
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}
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},
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.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_EP_SRWD,
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.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_EP_SRWD,
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.write = SPI_CHIP_WRITE256,
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.read = SPI_CHIP_READ, /* also fast read 0x0B */
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.voltage = {2700, 3600},
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},
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{
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.vendor = "Intel",
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.name = "28F001BN/BX-B",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F001B,
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.total_size = 128,
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.page_size = 128 * 1024, /* 8k + 2x4k + 112k */
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.tested = TEST_UNTESTED,
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.probe = PROBE_JEDEC,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{8 * 1024, 1},
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{4 * 1024, 2},
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{112 * 1024, 1},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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.voltage = {4500, 5500},
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},
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{
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.vendor = "Intel",
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.name = "28F001BN/BX-T",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F001T,
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.total_size = 128,
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.page_size = 128 * 1024, /* 112k + 2x4k + 8k */
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.tested = TEST_OK_PREW,
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.probe = PROBE_JEDEC,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{112 * 1024, 1},
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{4 * 1024, 2},
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{8 * 1024, 1},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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.voltage = {4500, 5500},
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},
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{
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.vendor = "Intel",
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.name = "28F002BC/BL/BV/BX-T",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F002T,
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.total_size = 256,
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.page_size = 256 * 1024,
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.tested = TEST_OK_PRE,
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.probe = PROBE_AT82802AB,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{128 * 1024, 1},
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{96 * 1024, 1},
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{8 * 1024, 2},
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{16 * 1024, 1},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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},
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{
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.vendor = "Intel",
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.name = "28F004B5/BE/BV/BX-B",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F004B,
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.total_size = 512,
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.page_size = 128 * 1024, /* maximal block size */
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.tested = TEST_UNTESTED,
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.probe = PROBE_AT82802AB,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{16 * 1024, 1},
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{8 * 1024, 2},
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{96 * 1024, 1},
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{128 * 1024, 3},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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},
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{
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.vendor = "Intel",
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.name = "28F004B5/BE/BV/BX-T",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F004T,
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.total_size = 512,
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.page_size = 128 * 1024, /* maximal block size */
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.tested = TEST_UNTESTED,
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.probe = PROBE_AT82802AB,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{128 * 1024, 3},
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{96 * 1024, 1},
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{8 * 1024, 2},
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{16 * 1024, 1},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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},
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{
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.vendor = "Intel",
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.name = "28F008S3/S5/SC",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F004S3,
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.total_size = 512,
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.page_size = 256,
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.tested = TEST_UNTESTED,
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.probe = PROBE_AT82802AB,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = { {64 * 1024, 8} },
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.unlock = UNLOCK_28F004S5,
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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},
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{
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.vendor = "Intel",
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.name = "28F400BV/BX/CE/CV-B",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F400B,
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.total_size = 512,
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.page_size = 128 * 1024, /* maximal block size */
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.feature_bits = FEATURE_ADDR_SHIFTED,
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.tested = TEST_UNTESTED,
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.probe = PROBE_AT82802AB,
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.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
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.block_erasers =
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{
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{
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.eraseblocks = {
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{16 * 1024, 1},
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{8 * 1024, 2},
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{96 * 1024, 1},
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{128 * 1024, 3},
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},
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.block_erase = ERASE_BLOCK_82802AB,
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},
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},
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.write = WRITE_82802AB,
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.read = READ_MEMMAPPED,
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},
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{
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.vendor = "Intel",
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.name = "28F400BV/BX/CE/CV-T",
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.bustype = BUS_PARALLEL,
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.manufacture_id = INTEL_ID,
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.model_id = INTEL_28F400T,
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.total_size = 512,
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.page_size = 128 * 1024, /* maximal block size */
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.feature_bits = FEATURE_ADDR_SHIFTED,
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.tested = TEST_UNTESTED,
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.probe = PROBE_AT82802AB,
|
|
.probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
|
|
.block_erasers =
|
|
{
|
|
{
|
|
.eraseblocks = {
|
|
{128 * 1024, 3},
|
|
{96 * 1024, 1},
|
|
{8 * 1024, 2},
|
|
{16 * 1024, 1},
|
|
},
|
|
.block_erase = ERASE_BLOCK_82802AB,
|
|
},
|
|
},
|
|
.write = WRITE_82802AB,
|
|
.read = READ_MEMMAPPED,
|
|
},
|
|
|
|
{
|
|
.vendor = "Intel",
|
|
.name = "AT82802AB",
|
|
.bustype = BUS_FWH,
|
|
.manufacture_id = INTEL_ID,
|
|
.model_id = INTEL_82802AB,
|
|
.total_size = 512,
|
|
.page_size = 64 * 1024,
|
|
.feature_bits = FEATURE_REGISTERMAP,
|
|
.tested = TEST_OK_PREW,
|
|
.probe = PROBE_AT82802AB,
|
|
.probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */
|
|
.block_erasers =
|
|
{
|
|
{
|
|
.eraseblocks = { {64 * 1024, 8} },
|
|
.block_erase = ERASE_BLOCK_82802AB,
|
|
},
|
|
},
|
|
.unlock = UNLOCK_REGSPACE2_UNIFORM_64K,
|
|
.write = WRITE_82802AB,
|
|
.read = READ_MEMMAPPED,
|
|
.voltage = {3000, 3600},
|
|
},
|
|
|
|
{
|
|
.vendor = "Intel",
|
|
.name = "82802AC",
|
|
.bustype = BUS_FWH,
|
|
.manufacture_id = INTEL_ID,
|
|
.model_id = INTEL_82802AC,
|
|
.total_size = 1024,
|
|
.page_size = 64 * 1024,
|
|
.feature_bits = FEATURE_REGISTERMAP,
|
|
.tested = TEST_OK_PR,
|
|
.probe = PROBE_AT82802AB,
|
|
.probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */
|
|
.block_erasers =
|
|
{
|
|
{
|
|
.eraseblocks = { {64 * 1024, 16} },
|
|
.block_erase = ERASE_BLOCK_82802AB,
|
|
},
|
|
},
|
|
.unlock = UNLOCK_REGSPACE2_UNIFORM_64K,
|
|
.write = WRITE_82802AB,
|
|
.read = READ_MEMMAPPED,
|
|
.voltage = {3000, 3600},
|
|
},
|