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05976c7e93
This patch moves all the declarations relevant to PCI into their own header in include/pcidev.h This is a simple refactor that aims to simplify maintenance and to clarify file dependency inside the project. Currently, most of the declarations reside in programmer.h making it difficult to really understand file dependency. Change-Id: Ie7cefa012d43e03d2d3886f1567ad9b3fe1b148c Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/89094 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
118 lines
2.9 KiB
C
118 lines
2.9 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "flash.h"
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#include "programmer.h"
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#include "hwaccess_x86_io.h"
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#include "pcidev.h"
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#define BIOS_ROM_ADDR 0x90
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#define BIOS_ROM_DATA 0x94
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#define REG_FLASH_ACCESS 0x58
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#define BIT_FLASH_ACCESS BIT(24)
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#define PCI_VENDOR_ID_HPT 0x1103
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struct atahpt_data {
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struct pci_dev *dev;
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uint32_t io_base_addr;
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uint32_t flash_access;
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};
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static const struct dev_entry ata_hpt[] = {
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{0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"},
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{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
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{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
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{0},
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};
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static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
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chipaddr addr)
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{
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struct atahpt_data *data = flash->mst->par.data;
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OUTL((uint32_t)addr, data->io_base_addr + BIOS_ROM_ADDR);
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OUTB(val, data->io_base_addr + BIOS_ROM_DATA);
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}
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static uint8_t atahpt_chip_readb(const struct flashctx *flash,
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const chipaddr addr)
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{
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struct atahpt_data *data = flash->mst->par.data;
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OUTL((uint32_t)addr, data->io_base_addr + BIOS_ROM_ADDR);
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return INB(data->io_base_addr + BIOS_ROM_DATA);
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}
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static int atahpt_shutdown(void *par_data)
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{
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struct atahpt_data *data = par_data;
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/* Restore original flash access state. */
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pci_write_long(data->dev, REG_FLASH_ACCESS, data->flash_access);
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free(par_data);
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return 0;
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}
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static const struct par_master par_master_atahpt = {
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.chip_readb = atahpt_chip_readb,
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.chip_writeb = atahpt_chip_writeb,
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.shutdown = atahpt_shutdown,
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};
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static int atahpt_init(const struct programmer_cfg *cfg)
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{
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struct pci_dev *dev = NULL;
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uint32_t io_base_addr;
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if (rget_io_perms())
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return 1;
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dev = pcidev_init(cfg, ata_hpt, PCI_BASE_ADDRESS_4);
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if (!dev)
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return 1;
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io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4);
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if (!io_base_addr)
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return 1;
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struct atahpt_data *data = calloc(1, sizeof(*data));
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if (!data) {
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msg_perr("Unable to allocate space for PAR master data\n");
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return 1;
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}
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data->dev = dev;
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data->io_base_addr = io_base_addr;
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/* Enable flash access. */
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data->flash_access = pci_read_long(dev, REG_FLASH_ACCESS);
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pci_write_long(dev, REG_FLASH_ACCESS, data->flash_access | BIT_FLASH_ACCESS);
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return register_par_master(&par_master_atahpt, BUS_PARALLEL, data);
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}
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const struct programmer_entry programmer_atahpt = {
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.name = "atahpt",
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.type = PCI,
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.devs.dev = ata_hpt,
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.init = atahpt_init,
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};
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