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05976c7e93
This patch moves all the declarations relevant to PCI into their own header in include/pcidev.h This is a simple refactor that aims to simplify maintenance and to clarify file dependency inside the project. Currently, most of the declarations reside in programmer.h making it difficult to really understand file dependency. Change-Id: Ie7cefa012d43e03d2d3886f1567ad9b3fe1b148c Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/89094 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2011 Carl-Daniel Hailfinger
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* Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdlib.h>
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#include "flash.h"
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#include "programmer.h"
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#include "hwaccess_physmap.h"
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#include "pcidev.h"
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struct it8212_data {
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struct pci_dev *dev;
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uint8_t *bar;
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uint32_t decode_access;
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};
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#define PCI_VENDOR_ID_ITE 0x1283
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static const struct dev_entry devs_it8212[] = {
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{PCI_VENDOR_ID_ITE, 0x8212, NT, "ITE", "8212F PATA RAID"},
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{0},
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};
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#define IT8212_MEMMAP_SIZE (128 * 1024)
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#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1)
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static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
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{
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const struct it8212_data *data = flash->mst->par.data;
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pci_mmio_writeb(val, data->bar + (addr & IT8212_MEMMAP_MASK));
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}
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static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
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{
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const struct it8212_data *data = flash->mst->par.data;
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return pci_mmio_readb(data->bar + (addr & IT8212_MEMMAP_MASK));
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}
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static int it8212_shutdown(void *par_data)
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{
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struct it8212_data *data = par_data;
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/* Restore ROM BAR decode state. */
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pci_write_long(data->dev, PCI_ROM_ADDRESS, data->decode_access);
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free(par_data);
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return 0;
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}
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static const struct par_master par_master_it8212 = {
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.chip_readb = it8212_chip_readb,
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.chip_writeb = it8212_chip_writeb,
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.shutdown = it8212_shutdown,
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};
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static int it8212_init(const struct programmer_cfg *cfg)
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{
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uint8_t *bar;
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struct pci_dev *dev = pcidev_init(cfg, devs_it8212, PCI_ROM_ADDRESS);
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if (!dev)
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return 1;
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/* Bit 0 is address decode enable, 17-31 the base address, everything else reserved/zero. */
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uint32_t io_base_addr = pcidev_readbar(dev, PCI_ROM_ADDRESS) & 0xFFFFFFFE;
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if (!io_base_addr)
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return 1;
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bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
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if (bar == ERROR_PTR)
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return 1;
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struct it8212_data *data = calloc(1, sizeof(*data));
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if (!data) {
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msg_perr("Unable to allocate space for PAR master data\n");
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return 1;
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}
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data->dev = dev;
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data->bar = bar;
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/* Enable ROM BAR decoding. */
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data->decode_access = pci_read_long(dev, PCI_ROM_ADDRESS);
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pci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
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max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
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return register_par_master(&par_master_it8212, BUS_PARALLEL, data);
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}
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const struct programmer_entry programmer_it8212 = {
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.name = "it8212",
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.type = PCI,
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.devs.dev = devs_it8212,
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.init = it8212_init,
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};
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