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0ee2dc0683
Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22387 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
318 lines
8.4 KiB
C
318 lines
8.4 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2014 Boris Baykov
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* SPI chip driver functions for 4-bytes addressing
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*/
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#include <string.h>
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#include "flash.h"
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#include "chipdrivers.h"
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#include "spi.h"
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#include "programmer.h"
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#include "spi4ba.h"
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/* #define MSG_TRACE_4BA_FUNCS 1 */
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#ifdef MSG_TRACE_4BA_FUNCS
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#define msg_trace(...) print(MSG_DEBUG, __VA_ARGS__)
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#else
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#define msg_trace(...)
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#endif
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/* Enter 4-bytes addressing mode (without sending WREN before) */
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int spi_enter_4ba_b7(struct flashctx *flash)
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{
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int result;
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const unsigned char cmd[JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_ENTER_4_BYTE_ADDR_MODE };
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msg_trace("-> %s\n", __func__);
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/* Switch to 4-bytes addressing mode */
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result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
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if (!result)
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flash->in_4ba_mode = true;
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return result;
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}
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/* Enter 4-bytes addressing mode with sending WREN before */
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int spi_enter_4ba_b7_we(struct flashctx *flash)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_ENTER_4_BYTE_ADDR_MODE },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s\n", __func__);
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/* Switch to 4-bytes addressing mode */
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result = spi_send_multicommand(flash, cmds);
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if (result)
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msg_cerr("%s failed during command execution\n", __func__);
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else
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flash->in_4ba_mode = true;
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return result;
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}
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/* Exit 4-bytes addressing mode (without sending WREN before) */
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int spi_exit_4ba_e9(struct flashctx *flash)
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{
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int result;
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const unsigned char cmd[JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_EXIT_4_BYTE_ADDR_MODE };
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msg_trace("-> %s\n", __func__);
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/* Switch to 3-bytes addressing mode */
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result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
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if (!result)
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flash->in_4ba_mode = false;
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return result;
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}
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/* Exit 4-bytes addressing mode with sending WREN before */
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int spi_exit_4ba_e9_we(struct flashctx *flash)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_EXIT_4_BYTE_ADDR_MODE },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s\n", __func__);
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/* Switch to 3-bytes addressing mode */
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result = spi_send_multicommand(flash, cmds);
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if (result)
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msg_cerr("%s failed during command execution\n", __func__);
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else
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flash->in_4ba_mode = false;
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return result;
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}
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/* Write Extended Address Register value */
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int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_WRITE_EXT_ADDR_REG,
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regdata
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (%02X)\n", __func__, regdata);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution\n", __func__);
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return result;
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}
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return 0;
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}
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/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes)
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JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips.
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The presence of this instruction for an exact chip should be checked
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by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
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int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_SE_4BA_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_SE_4BA,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 15-800 ms, so wait in 10 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(10 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes)
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JEDEC_BE_5C_4BA (5Ch) instruction is new for 4-bytes addressing flash chips.
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The presence of this instruction for an exact chip should be checked
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by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
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int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_5C_4BA_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_BE_5C_4BA,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes)
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JEDEC_BE_DC_4BA (DCh) instruction is new for 4-bytes addressing flash chips.
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The presence of this instruction for an exact chip should be checked
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by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */
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int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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int result;
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struct spi_command cmds[] = {
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{
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.writecnt = JEDEC_WREN_OUTSIZE,
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.writearr = (const unsigned char[]){ JEDEC_WREN },
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = JEDEC_BE_DC_4BA_OUTSIZE,
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.writearr = (const unsigned char[]){
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JEDEC_BE_DC_4BA,
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(addr >> 24) & 0xff,
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(addr >> 16) & 0xff,
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(addr >> 8) & 0xff,
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(addr & 0xff)
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},
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.readcnt = 0,
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.readarr = NULL,
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}, {
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.writecnt = 0,
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.writearr = NULL,
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.readcnt = 0,
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.readarr = NULL,
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}};
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msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1);
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result = spi_send_multicommand(flash, cmds);
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if (result) {
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msg_cerr("%s failed during command execution at address 0x%x\n",
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__func__, addr);
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return result;
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}
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/* Wait until the Write-In-Progress bit is cleared.
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* This usually takes 100-4000 ms, so wait in 100 ms steps.
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*/
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while (spi_read_status_register(flash) & SPI_SR_WIP)
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programmer_delay(100 * 1000);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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