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cff87a8488
New functions are exposed through the libflashrom API for
reading/writing chip's WP settins: `flashrom_wp_{read,write}_cfg()`.
They read/write an opaque `struct flashrom_wp_cfg` instance, which
includes the flash protection range and status register protection mode.
This commit also adds `{read,write}_wp_bits()` helper functions that
read/write chip-specific WP configuration bits.
BUG=b:195381327,b:153800563
BRANCH=none
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2010 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __WRITEPROTECT_H__
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#define __WRITEPROTECT_H__ 1
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "libflashrom.h"
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#define MAX_BP_BITS 4
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/* Chip protection range: start address and length. */
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struct wp_range {
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size_t start, len;
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};
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/* Generic description of a chip's write protection configuration. */
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struct flashrom_wp_cfg {
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enum flashrom_wp_mode mode;
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struct wp_range range;
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};
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/*
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* Description of a chip's write protection configuration.
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*
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* It allows most WP code to store and manipulate a chip's configuration
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* without knowing the exact layout of bits in the chip's status registers.
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*/
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struct wp_bits {
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/* Status register protection bit (SRP) */
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bool srp_bit_present;
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uint8_t srp;
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/* Status register lock bit (SRL) */
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bool srl_bit_present;
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uint8_t srl;
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/* Complement bit (CMP) */
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bool cmp_bit_present;
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uint8_t cmp;
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/* Sector/block protection bit (SEC) */
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bool sec_bit_present;
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uint8_t sec;
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/* Top/bottom protection bit (TB) */
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bool tb_bit_present;
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uint8_t tb;
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/* Block protection bits (BP) */
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size_t bp_bit_count;
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uint8_t bp[MAX_BP_BITS];
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};
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struct flashrom_flashctx;
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/* Write WP configuration to the chip */
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enum flashrom_wp_result wp_write_cfg(struct flashrom_flashctx *, const struct flashrom_wp_cfg *);
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/* Read WP configuration from the chip */
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enum flashrom_wp_result wp_read_cfg(struct flashrom_wp_cfg *, struct flashrom_flashctx *);
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#endif /* !__WRITEPROTECT_H__ */
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