mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00

Projects using libflashrom like fwupd expect the user to wait for the operation to complete. To avoid the user thinking the process has "hung" or "got stuck" report back the progress complete of the erase, write and read operations. Add a new --progress flag to the CLI to report progress of operations. Include a test for the dummy spi25 device. TEST=./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus=7 -r /dev/null --progress Change-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c Signed-off-by: Richard Hughes <richard@hughsie.com> Signed-off-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
529 lines
14 KiB
C
529 lines
14 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2020 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <time.h>
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#include <errno.h>
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#include "programmer.h"
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#include "spi.h"
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#include "i2c_helper.h"
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#define MCU_I2C_SLAVE_ADDR 0x94
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#define REGISTER_ADDRESS (0x94 >> 1)
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#define RTK_PAGE_SIZE 128
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#define MAX_SPI_WAIT_RETRIES 1000
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#define MCU_MODE 0x6F
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#define MCU_ISP_MODE_MASK 0x80
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#define START_WRITE_XFER 0xA0
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#define WRITE_XFER_STATUS_MASK 0x20
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#define MCU_DATA_PORT 0x70
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#define MAP_PAGE_BYTE2 0x64
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#define MAP_PAGE_BYTE1 0x65
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#define MAP_PAGE_BYTE0 0x66
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//opcodes
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#define OPCODE_READ 3
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#define OPCODE_WRITE 2
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#define GPIO_CONFIG_ADDRESS 0x104F
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#define GPIO_VALUE_ADDRESS 0xFE3F
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struct realtek_mst_i2c_spi_data {
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int fd;
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int reset;
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};
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static int realtek_mst_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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return SPI_GENERIC_ERROR;
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return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
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}
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static int realtek_mst_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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return SPI_GENERIC_ERROR;
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return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
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}
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static int get_fd_from_context(const struct flashctx *flash)
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{
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if (!flash || !flash->mst || !flash->mst->spi.data) {
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msg_perr("Unable to extract fd from flash context.\n");
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return SPI_GENERIC_ERROR;
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}
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const struct realtek_mst_i2c_spi_data *data =
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(const struct realtek_mst_i2c_spi_data *)flash->mst->spi.data;
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return data->fd;
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}
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static int realtek_mst_i2c_spi_write_register(int fd, uint8_t reg, uint8_t value)
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{
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uint8_t command[] = { reg, value };
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return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
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}
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static int realtek_mst_i2c_spi_read_register(int fd, uint8_t reg, uint8_t *value)
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{
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uint8_t command[] = { reg };
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int ret = realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
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ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
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return ret ? SPI_GENERIC_ERROR : 0;
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}
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static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask,
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int target, int multiplier)
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{
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uint8_t val;
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int tried = 0;
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int ret = 0;
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do {
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ret |= realtek_mst_i2c_spi_read_register(fd, offset, &val);
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} while (!ret && ((val & mask) != target) && ++tried < (MAX_SPI_WAIT_RETRIES*multiplier));
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if (tried == MAX_SPI_WAIT_RETRIES) {
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msg_perr("%s: Time out on sending command.\n", __func__);
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return -MAX_SPI_WAIT_RETRIES;
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}
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return (val & mask) != target ? SPI_GENERIC_ERROR : ret;
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}
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static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
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{
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int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, MCU_ISP_MODE_MASK);
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/* wait for ISP mode enter success */
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ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, MCU_ISP_MODE_MASK, MCU_ISP_MODE_MASK, 1);
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if (ret)
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return ret;
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// set internal osc divider register to default to speed up MCU
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// 0x06A0 = 0x74
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x06);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xA0);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x74);
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return ret;
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}
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static int realtek_mst_i2c_execute_write(int fd)
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{
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int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, START_WRITE_XFER);
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ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, WRITE_XFER_STATUS_MASK, 0, 1);
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return ret;
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}
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static int realtek_mst_i2c_spi_reset_mpu(int fd)
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{
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uint8_t mcu_mode_val;
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int ret = realtek_mst_i2c_spi_read_register(fd, MCU_MODE, &mcu_mode_val);
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if (ret || (mcu_mode_val & MCU_ISP_MODE_MASK) == 0) {
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msg_perr("%s: MST not in ISP mode, cannot perform MCU reset.\n", __func__);
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return SPI_GENERIC_ERROR;
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}
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// 0xFFEE[1] = 1;
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uint8_t val = 0;
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ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
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return ret;
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}
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static int realtek_mst_i2c_spi_select_indexed_register(int fd, uint16_t address)
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{
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int ret = 0;
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, address >> 8);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, address & 0xFF);
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return ret;
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}
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static int realtek_mst_i2c_spi_write_indexed_register(int fd, uint16_t address, uint8_t val)
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{
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int ret = 0;
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ret |= realtek_mst_i2c_spi_select_indexed_register(fd, address);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, val);
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return ret;
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}
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static int realtek_mst_i2c_spi_read_indexed_register(int fd, uint16_t address, uint8_t *val)
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{
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int ret = 0;
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ret |= realtek_mst_i2c_spi_select_indexed_register(fd, address);
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ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, val);
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return ret;
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}
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/* Toggle the GPIO pin 88, this could be routed to different controls like write
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* protection or a led. */
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static int realtek_mst_i2c_spi_toggle_gpio_88_strap(int fd, bool toggle)
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{
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int ret = 0;
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uint8_t val = 0;
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/* Read register 0x104F into val. */
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ret |= realtek_mst_i2c_spi_read_indexed_register(fd, GPIO_CONFIG_ADDRESS, &val);
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/* Write 0x104F[3:0] = b0001 to enable the toggle of pin value. */
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ret |= realtek_mst_i2c_spi_write_indexed_register(fd, GPIO_CONFIG_ADDRESS, (val & 0xF0) | 0x01);
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/* Read register 0xFE3F into val. */
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ret |= realtek_mst_i2c_spi_read_indexed_register(fd, GPIO_VALUE_ADDRESS, &val);
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/* Write 0xFE3F[0] = b|toggle| to toggle pin value to low/high. */
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ret |= realtek_mst_i2c_spi_write_indexed_register(fd, GPIO_VALUE_ADDRESS, (val & 0xFE) | toggle);
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return ret;
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}
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static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
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unsigned int writecnt, unsigned int readcnt,
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const unsigned char *writearr,
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unsigned char *readarr)
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{
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unsigned i;
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int max_timeout_mul = 1;
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int ret = 0;
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if (writecnt > 4 || readcnt > 3 || writecnt == 0) {
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return SPI_GENERIC_ERROR;
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}
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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/* First byte of writearr should be the spi opcode value, followed by the value to write. */
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writecnt--;
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/**
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* Before dispatching a SPI opcode the MCU register 0x60 requires
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* the following configuration byte set:
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*
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* BIT0 - start [0] , end [1].
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* BITS[1-4] - counts.
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* BITS[5-7] - opcode type.
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*
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* | bit7 | bit6 | bit5 |
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* +------+------+------+
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* | 0 | 1 | 0 | ~ JEDEC_RDID,REMS,READ
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* | 0 | 1 | 1 | ~ JEDEC_WRSR
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* | 1 | 0 | 1 | ~ JEDEC_.. erasures.
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*/
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uint8_t ctrl_reg_val = (writecnt << 3) | (readcnt << 1);
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switch (writearr[0]) {
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/* WREN isn't a supported somehow? ignore it. */
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case JEDEC_WREN: return 0;
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/* WRSR requires BIT6 && BIT5 set. */
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case JEDEC_WRSR:
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ctrl_reg_val |= (1 << 5);
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ctrl_reg_val |= (2 << 5);
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break;
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/* Erasures require BIT7 && BIT5 set. */
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case JEDEC_CE_C7:
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max_timeout_mul *= 20; /* chip erasures take much longer! */
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/* FALLTHRU */
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case JEDEC_CE_60:
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case JEDEC_BE_52:
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case JEDEC_BE_D8:
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case JEDEC_BE_D7:
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case JEDEC_SE:
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ctrl_reg_val |= (1 << 5);
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ctrl_reg_val |= (4 << 5);
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break;
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default:
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/* Otherwise things like RDID,REMS,READ require BIT6 */
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ctrl_reg_val |= (2 << 5);
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}
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */
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for (i = 0; i < writecnt; ++i)
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1);
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if (ret)
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return ret;
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ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, max_timeout_mul);
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if (ret)
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return ret;
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for (i = 0; i < readcnt; ++i)
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ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]);
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return ret;
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}
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static int realtek_mst_i2c_spi_map_page(int fd, uint32_t addr)
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{
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int ret = 0;
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uint8_t block_idx = (addr >> 16) & 0xff;
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uint8_t page_idx = (addr >> 8) & 0xff;
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uint8_t byte_idx = addr & 0xff;
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
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return ret ? SPI_GENERIC_ERROR : 0;
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}
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static int realtek_mst_i2c_spi_write_page(int fd, uint8_t reg, const uint8_t *buf, unsigned int len)
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{
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/**
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* Using static buffer with maximum possible size,
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* extra byte is needed for prefixing the data port register at index 0.
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*/
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uint8_t wbuf[RTK_PAGE_SIZE + 1] = { MCU_DATA_PORT };
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if (len > RTK_PAGE_SIZE)
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return SPI_GENERIC_ERROR;
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memcpy(&wbuf[1], buf, len);
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return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, wbuf, len + 1);
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}
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static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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unsigned i;
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int ret = 0;
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if (start & 0xff)
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return default_spi_read(flash, buf, start, len);
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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start--;
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ);
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ret |= realtek_mst_i2c_spi_map_page(fd, start);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
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if (ret)
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return ret;
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ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, 1);
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if (ret)
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return ret;
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/**
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* The first byte is just a null, probably a status code?
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* Advance the read by a offset of one byte and continue.
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*/
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uint8_t dummy;
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realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
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for (i = 0; i < len; i += RTK_PAGE_SIZE) {
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ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,
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buf + i, min(len - i, RTK_PAGE_SIZE));
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if (ret)
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return ret;
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}
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return ret;
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}
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static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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unsigned i;
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int ret = 0;
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if (start & 0xff)
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return default_spi_write_256(flash, buf, start, len);
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x6D, 0x02); /* write opcode */
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, (RTK_PAGE_SIZE - 1)); /* fit len=256 */
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for (i = 0; i < len; i += RTK_PAGE_SIZE) {
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uint16_t page_len = min(len - i, RTK_PAGE_SIZE);
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if (len - i < RTK_PAGE_SIZE)
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1);
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ret |= realtek_mst_i2c_spi_map_page(fd, start + i);
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if (ret)
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break;
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/* Wait for empty buffer. */
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ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, 0x10, 0x10, 1);
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if (ret)
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break;
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ret |= realtek_mst_i2c_spi_write_page(fd, MCU_DATA_PORT,
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buf + i, page_len);
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if (ret)
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break;
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ret |= realtek_mst_i2c_execute_write(fd);
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if (ret)
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break;
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update_progress(flash, FLASHROM_PROGRESS_WRITE, i + RTK_PAGE_SIZE, len);
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}
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return ret;
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}
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static int realtek_mst_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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msg_perr("%s: AAI write function is not supported.\n", __func__);
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return SPI_GENERIC_ERROR;
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}
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static int realtek_mst_i2c_spi_shutdown(void *data)
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{
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int ret = 0;
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struct realtek_mst_i2c_spi_data *realtek_mst_data =
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(struct realtek_mst_i2c_spi_data *)data;
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int fd = realtek_mst_data->fd;
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ret |= realtek_mst_i2c_spi_toggle_gpio_88_strap(fd, false);
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if (realtek_mst_data->reset) {
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/*
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* Return value for reset mpu is not checked since
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* the return value is not guaranteed to be 0 on a
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* success reset. Currently there is no way to fix
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* that. For more details see b:147402710.
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*/
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realtek_mst_i2c_spi_reset_mpu(fd);
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}
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i2c_close(fd);
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free(data);
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return ret;
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}
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|
|
|
static const struct spi_master spi_master_i2c_realtek_mst = {
|
|
.max_data_read = 16,
|
|
.max_data_write = 8,
|
|
.command = realtek_mst_i2c_spi_send_command,
|
|
.multicommand = default_spi_send_multicommand,
|
|
.read = realtek_mst_i2c_spi_read,
|
|
.write_256 = realtek_mst_i2c_spi_write_256,
|
|
.write_aai = realtek_mst_i2c_spi_write_aai,
|
|
.shutdown = realtek_mst_i2c_spi_shutdown,
|
|
};
|
|
|
|
static int get_params(int *reset, int *enter_isp)
|
|
{
|
|
char *reset_str = NULL, *isp_str = NULL;
|
|
int ret = 0;
|
|
|
|
reset_str = extract_programmer_param("reset-mcu");
|
|
if (reset_str) {
|
|
if (reset_str[0] == '1') {
|
|
*reset = 1;
|
|
} else if (reset_str[0] == '0') {
|
|
*reset = 0;
|
|
} else {
|
|
msg_perr("%s: Incorrect param format, reset-mcu=1 or 0.\n", __func__);
|
|
ret = SPI_GENERIC_ERROR;
|
|
}
|
|
} else {
|
|
*reset = 0; /* Default behaviour is no MCU reset on tear-down. */
|
|
}
|
|
free(reset_str);
|
|
|
|
isp_str = extract_programmer_param("enter-isp");
|
|
if (isp_str) {
|
|
if (isp_str[0] == '1') {
|
|
*enter_isp = 1;
|
|
} else if (isp_str[0] == '0') {
|
|
*enter_isp = 0;
|
|
} else {
|
|
msg_perr("%s: Incorrect param format, enter-isp=1 or 0.\n", __func__);
|
|
ret = SPI_GENERIC_ERROR;
|
|
}
|
|
} else {
|
|
*enter_isp = 1; /* Default behaviour is enter ISP on setup. */
|
|
}
|
|
free(isp_str);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int realtek_mst_i2c_spi_init(void)
|
|
{
|
|
int ret = 0;
|
|
int reset = 0, enter_isp = 0;
|
|
|
|
if (get_params(&reset, &enter_isp))
|
|
return SPI_GENERIC_ERROR;
|
|
|
|
int fd = i2c_open_from_programmer_params(REGISTER_ADDRESS, 0);
|
|
if (fd < 0)
|
|
return fd;
|
|
|
|
if (enter_isp) {
|
|
ret |= realtek_mst_i2c_spi_enter_isp_mode(fd);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
ret |= realtek_mst_i2c_spi_toggle_gpio_88_strap(fd, true);
|
|
if (ret) {
|
|
msg_perr("Unable to toggle gpio 88 strap to True.\n");
|
|
return ret;
|
|
}
|
|
|
|
struct realtek_mst_i2c_spi_data *data = calloc(1, sizeof(*data));
|
|
if (!data) {
|
|
msg_perr("Unable to allocate space for extra SPI master data.\n");
|
|
return SPI_GENERIC_ERROR;
|
|
}
|
|
|
|
data->fd = fd;
|
|
data->reset = reset;
|
|
return register_spi_master(&spi_master_i2c_realtek_mst, data);
|
|
}
|
|
|
|
const struct programmer_entry programmer_realtek_mst_i2c_spi = {
|
|
.name = "realtek_mst_i2c_spi",
|
|
.type = OTHER,
|
|
.devs.note = "Device files /dev/i2c-*.\n",
|
|
.init = realtek_mst_i2c_spi_init,
|
|
.map_flash_region = fallback_map,
|
|
.unmap_flash_region = fallback_unmap,
|
|
.delay = internal_delay,
|
|
};
|