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https://review.coreboot.org/flashrom.git
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5a7cb847f0
All the driver conversion work and cleanup has been done by Stefan. flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel. Corresponding to flashrom svn r1579. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
289 lines
6.6 KiB
C
289 lines
6.6 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2008 coresystems GmbH
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* Copyright (C) 2010 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "flash.h"
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static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
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{
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chipaddr wrprotect = flash->virtual_registers + offset + 2;
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uint8_t locking;
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locking = chip_readb(flash, wrprotect);
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msg_cdbg("Lock status of block at 0x%08x is ", offset);
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switch (locking & 0x7) {
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case 0:
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msg_cdbg("Full Access.\n");
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break;
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case 1:
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msg_cdbg("Write Lock (Default State).\n");
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break;
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case 2:
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msg_cdbg("Locked Open (Full Access, Lock Down).\n");
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break;
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case 3:
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msg_cerr("Error: Write Lock, Locked Down.\n");
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break;
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case 4:
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msg_cdbg("Read Lock.\n");
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break;
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case 5:
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msg_cdbg("Read/Write Lock.\n");
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break;
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case 6:
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msg_cerr("Error: Read Lock, Locked Down.\n");
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break;
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case 7:
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msg_cerr("Error: Read/Write Lock, Locked Down.\n");
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break;
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}
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/* Read or write lock present? */
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return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0;
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}
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static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
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{
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chipaddr wrprotect = flash->virtual_registers + offset + 2;
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uint8_t locking;
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locking = chip_readb(flash, wrprotect);
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/* Read or write lock present? */
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if (locking & ((1 << 2) | (1 << 0))) {
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/* Lockdown active? */
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if (locking & (1 << 1)) {
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msg_cerr("Can't unlock block at 0x%08x!\n", offset);
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return -1;
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} else {
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msg_cdbg("Unlocking block at 0x%08x\n", offset);
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chip_writeb(flash, 0, wrprotect);
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}
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}
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return 0;
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}
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static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset)
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{
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chipaddr bios = flash->virtual_memory;
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uint8_t val;
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/* Product Identification Entry */
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chip_writeb(flash, 0xAA, bios + 0x5555);
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chip_writeb(flash, 0x55, bios + 0x2AAA);
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chip_writeb(flash, 0x90, bios + 0x5555);
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programmer_delay(10);
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/* Read something, maybe hardware lock bits */
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val = chip_readb(flash, bios + offset);
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/* Product Identification Exit */
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chip_writeb(flash, 0xAA, bios + 0x5555);
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chip_writeb(flash, 0x55, bios + 0x2AAA);
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chip_writeb(flash, 0xF0, bios + 0x5555);
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programmer_delay(10);
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return val;
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}
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static int printlock_w39_tblwp(uint8_t lock)
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{
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msg_cdbg("Hardware bootblock locking (#TBL) is %sactive.\n",
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(lock & (1 << 2)) ? "" : "not ");
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msg_cdbg("Hardware remaining chip locking (#WP) is %sactive..\n",
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(lock & (1 << 3)) ? "" : "not ");
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if (lock & ((1 << 2) | (1 << 3)))
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return -1;
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return 0;
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}
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static int printlock_w39_bootblock_64k16k(uint8_t lock)
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{
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msg_cdbg("Software 64 kB bootblock locking is %sactive.\n",
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(lock & (1 << 0)) ? "" : "not ");
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msg_cdbg("Software 16 kB bootblock locking is %sactive.\n",
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(lock & (1 << 1)) ? "" : "not ");
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if (lock & ((1 << 1) | (1 << 0)))
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return -1;
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return 0;
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}
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static int printlock_w39_common(struct flashctx *flash, unsigned int offset)
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{
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uint8_t lock;
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lock = w39_idmode_readb(flash, offset);
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msg_cdbg("Lockout bits:\n");
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return printlock_w39_tblwp(lock);
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}
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static int printlock_w39_fwh(struct flashctx *flash)
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{
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unsigned int i, total_size = flash->chip->total_size * 1024;
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int ret = 0;
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/* Print lock status of the complete chip */
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for (i = 0; i < total_size; i += flash->chip->page_size)
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ret |= printlock_w39_fwh_block(flash, i);
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return ret;
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}
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static int unlock_w39_fwh(struct flashctx *flash)
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{
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unsigned int i, total_size = flash->chip->total_size * 1024;
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/* Unlock the complete chip */
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for (i = 0; i < total_size; i += flash->chip->page_size)
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if (unlock_w39_fwh_block(flash, i))
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return -1;
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return 0;
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}
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int printlock_w39l040(struct flashctx *flash)
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{
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uint8_t lock;
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int ret;
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lock = w39_idmode_readb(flash, 0x00002);
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msg_cdbg("Bottom boot block:\n");
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ret = printlock_w39_bootblock_64k16k(lock);
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lock = w39_idmode_readb(flash, 0x7fff2);
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msg_cdbg("Top boot block:\n");
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ret |= printlock_w39_bootblock_64k16k(lock);
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return ret;
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}
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int printlock_w39v040a(struct flashctx *flash)
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{
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uint8_t lock;
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int ret = 0;
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/* The W39V040A datasheet contradicts itself on the lock register
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* location: 0x00002 and 0x7fff2 are both mentioned. Pick the one
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* which is similar to the other chips of the same family.
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*/
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lock = w39_idmode_readb(flash, 0x7fff2);
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msg_cdbg("Lockout bits:\n");
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ret = printlock_w39_tblwp(lock);
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ret |= printlock_w39_bootblock_64k16k(lock);
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return ret;
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}
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int printlock_w39v040b(struct flashctx *flash)
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{
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return printlock_w39_common(flash, 0x7fff2);
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}
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int printlock_w39v040c(struct flashctx *flash)
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{
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/* Typo in the datasheet? The other chips use 0x7fff2. */
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return printlock_w39_common(flash, 0xfff2);
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}
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int printlock_w39v040fa(struct flashctx *flash)
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{
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int ret = 0;
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ret = printlock_w39v040a(flash);
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ret |= printlock_w39_fwh(flash);
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return ret;
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}
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int printlock_w39v040fb(struct flashctx *flash)
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{
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int ret = 0;
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ret = printlock_w39v040b(flash);
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ret |= printlock_w39_fwh(flash);
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return ret;
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}
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int printlock_w39v040fc(struct flashctx *flash)
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{
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int ret = 0;
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/* W39V040C and W39V040FC use different WP/TBL offsets. */
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ret = printlock_w39_common(flash, 0x7fff2);
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ret |= printlock_w39_fwh(flash);
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return ret;
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}
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int printlock_w39v080a(struct flashctx *flash)
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{
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return printlock_w39_common(flash, 0xffff2);
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}
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int printlock_w39v080fa(struct flashctx *flash)
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{
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int ret = 0;
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ret = printlock_w39v080a(flash);
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ret |= printlock_w39_fwh(flash);
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return ret;
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}
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int printlock_w39v080fa_dual(struct flashctx *flash)
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{
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msg_cinfo("Block locking for W39V080FA in dual mode is "
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"undocumented.\n");
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/* Better safe than sorry. */
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return -1;
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}
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int unlock_w39v040fb(struct flashctx *flash)
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{
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if (unlock_w39_fwh(flash))
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return -1;
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if (printlock_w39_common(flash, 0x7fff2))
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return -1;
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return 0;
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}
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int unlock_w39v080fa(struct flashctx *flash)
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{
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if (unlock_w39_fwh(flash))
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return -1;
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if (printlock_w39_common(flash, 0xffff2))
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return -1;
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return 0;
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}
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int printlock_at49f(struct flashctx *flash)
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{
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uint8_t lock = w39_idmode_readb(flash, 0x00002);
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msg_cdbg("Hardware bootblock lockout is %sactive.\n",
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(lock & 0x01) ? "" : "not ");
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return 0;
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}
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