mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00

Convert the anon union of registered masters in the mst field of the flashctx to a anon struct. If we are going to dereference a pointer there in an undefined way we should crash and not plow ahead with invalid memory. The user of the registered_masters type is therefore responsible for querying the buses_supported field before attempting to dereference a ptr field in the anon struct. BUG=b:175849641 TEST=`flashrom -p internal --flash-name` Change-Id: I576967a8599b923c902e39f177f39146291cc242 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/50246 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Daniel Campello <campello@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
153 lines
4.4 KiB
C
153 lines
4.4 KiB
C
/*
|
|
* This file is part of the flashrom project.
|
|
*
|
|
* Copyright (C) 2007, 2008, 2009, 2010, 2011 Carl-Daniel Hailfinger
|
|
* Copyright (C) 2008 coresystems GmbH
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
/*
|
|
* Contains the generic SPI framework
|
|
*/
|
|
|
|
#include <strings.h>
|
|
#include <string.h>
|
|
#include "flash.h"
|
|
#include "flashchips.h"
|
|
#include "chipdrivers.h"
|
|
#include "programmer.h"
|
|
#include "spi.h"
|
|
|
|
int spi_send_command(const struct flashctx *flash, unsigned int writecnt,
|
|
unsigned int readcnt, const unsigned char *writearr,
|
|
unsigned char *readarr)
|
|
{
|
|
return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
|
|
readarr);
|
|
}
|
|
|
|
int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds)
|
|
{
|
|
return flash->mst->spi.multicommand(flash, cmds);
|
|
}
|
|
|
|
int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt,
|
|
unsigned int readcnt,
|
|
const unsigned char *writearr,
|
|
unsigned char *readarr)
|
|
{
|
|
struct spi_command cmd[] = {
|
|
{
|
|
.writecnt = writecnt,
|
|
.readcnt = readcnt,
|
|
.writearr = writearr,
|
|
.readarr = readarr,
|
|
}, {
|
|
.writecnt = 0,
|
|
.writearr = NULL,
|
|
.readcnt = 0,
|
|
.readarr = NULL,
|
|
}};
|
|
|
|
return spi_send_multicommand(flash, cmd);
|
|
}
|
|
|
|
int default_spi_send_multicommand(const struct flashctx *flash,
|
|
struct spi_command *cmds)
|
|
{
|
|
int result = 0;
|
|
for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
|
|
result = spi_send_command(flash, cmds->writecnt, cmds->readcnt,
|
|
cmds->writearr, cmds->readarr);
|
|
}
|
|
return result;
|
|
}
|
|
|
|
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
|
|
unsigned int len)
|
|
{
|
|
unsigned int max_data = flash->mst->spi.max_data_read;
|
|
if (max_data == MAX_DATA_UNSPECIFIED) {
|
|
msg_perr("%s called, but SPI read chunk size not defined "
|
|
"on this hardware. Please report a bug at "
|
|
"flashrom@flashrom.org\n", __func__);
|
|
return 1;
|
|
}
|
|
return spi_read_chunked(flash, buf, start, len, max_data);
|
|
}
|
|
|
|
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
|
|
{
|
|
unsigned int max_data = flash->mst->spi.max_data_write;
|
|
if (max_data == MAX_DATA_UNSPECIFIED) {
|
|
msg_perr("%s called, but SPI write chunk size not defined "
|
|
"on this hardware. Please report a bug at "
|
|
"flashrom@flashrom.org\n", __func__);
|
|
return 1;
|
|
}
|
|
return spi_write_chunked(flash, buf, start, len, max_data);
|
|
}
|
|
|
|
int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
|
|
unsigned int len)
|
|
{
|
|
int ret;
|
|
size_t to_read;
|
|
for (; len; len -= to_read, buf += to_read, start += to_read) {
|
|
/* Do not cross 16MiB boundaries in a single transfer.
|
|
This helps with
|
|
o multi-die 4-byte-addressing chips,
|
|
o dediprog that has a protocol limit of 32MiB-512B. */
|
|
to_read = min(ALIGN_DOWN(start + 16*MiB, 16*MiB) - start, len);
|
|
ret = flash->mst->spi.read(flash, buf, start, to_read);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Program chip using page (256 bytes) programming.
|
|
* Some SPI masters can't do this, they use single byte programming instead.
|
|
* The redirect to single byte programming is achieved by setting
|
|
* .write_256 = spi_chip_write_1
|
|
*/
|
|
/* real chunksize is up to 256, logical chunksize is 256 */
|
|
int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
|
|
{
|
|
return flash->mst->spi.write_256(flash, buf, start, len);
|
|
}
|
|
|
|
int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
|
|
{
|
|
return flash->mst->spi.write_aai(flash, buf, start, len);
|
|
}
|
|
|
|
int register_spi_master(const struct spi_master *mst)
|
|
{
|
|
struct registered_master rmst = {0};
|
|
|
|
if (!mst->write_aai || !mst->write_256 || !mst->read || !mst->command ||
|
|
!mst->multicommand ||
|
|
((mst->command == default_spi_send_command) &&
|
|
(mst->multicommand == default_spi_send_multicommand))) {
|
|
msg_perr("%s called with incomplete master definition. "
|
|
"Please report a bug at flashrom@flashrom.org\n",
|
|
__func__);
|
|
return ERROR_FLASHROM_BUG;
|
|
}
|
|
|
|
|
|
rmst.buses_supported = BUS_SPI;
|
|
rmst.spi = *mst;
|
|
return register_master(&rmst);
|
|
}
|