mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-28 23:43:42 +02:00
5820f42ef2
Use chipaddr instead of volatile uint8_t * because when we access chips
in external flashers, they are not accessed via pointers at all.
Benefits: This allows us to differentiate between volatile machine
memory accesses and flash chip accesses. It also enforces usage
of chip_{read,write}[bwl] to access flash chips, so nobody will
unintentionally use pointers to access chips anymore. Some unneeded
casts are removed as well. Grepping for chip operations and machine
memory operations doesn't yield any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Corresponding to flashrom svn r519.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
99 lines
2.7 KiB
C
99 lines
2.7 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2008 Peter Stuge <peter@stuge.se>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdio.h>
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#include "flash.h"
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int probe_w39v040c(struct flashchip *flash)
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{
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chipaddr bios = flash->virtual_memory;
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uint8_t id1, id2, lock;
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chip_writeb(0xAA, bios + 0x5555);
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myusec_delay(10);
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chip_writeb(0x55, bios + 0x2AAA);
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myusec_delay(10);
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chip_writeb(0x90, bios + 0x5555);
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myusec_delay(10);
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id1 = chip_readb(bios);
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id2 = chip_readb(bios + 1);
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lock = chip_readb(bios + 0xfff2);
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chip_writeb(0xAA, bios + 0x5555);
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myusec_delay(10);
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chip_writeb(0x55, bios + 0x2AAA);
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myusec_delay(10);
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chip_writeb(0xF0, bios + 0x5555);
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myusec_delay(40);
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printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);
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if (!oddparity(id1))
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printf_debug(", id1 parity violation");
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printf_debug("\n");
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if (flash->manufacture_id == id1 && flash->model_id == id2) {
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printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n",
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__func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un");
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return 1;
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}
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return 0;
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}
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int erase_w39v040c(struct flashchip *flash)
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{
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int i;
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unsigned int total_size = flash->total_size * 1024;
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chipaddr bios = flash->virtual_memory;
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for (i = 0; i < total_size; i += flash->page_size)
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erase_sector_jedec(flash->virtual_memory, i);
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for (i = 0; i < total_size; i++)
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if (0xff != chip_readb(bios + i)) {
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printf("ERASE FAILED at 0x%08x! Expected=0xff, Read=0x%02x\n", i, chip_readb(bios + i));
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return -1;
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}
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return 0;
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}
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int write_w39v040c(struct flashchip *flash, uint8_t *buf)
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{
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int i;
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int total_size = flash->total_size * 1024;
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int page_size = flash->page_size;
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chipaddr bios = flash->virtual_memory;
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if (flash->erase(flash))
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return -1;
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printf("Programming page: ");
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for (i = 0; i < total_size / page_size; i++) {
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printf("%04d at address: 0x%08x", i, i * page_size);
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write_sector_jedec(bios, buf + i * page_size,
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bios + i * page_size, page_size);
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printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
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}
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printf("\n");
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return 0;
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}
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