mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-29 07:53:44 +02:00
592c1c3e5f
Currently, the code assumes the nCS pin of spi nor flash is connected to either nRESET(pin 15) or nTRST(pin 3). But it is incompatible with the pinout from official JFlash SPI, whereas the nCS pin is wired to TMS(pin 7). This commit adds cs=tms option to share the same pinout as JFlash SPI. It works by toggling TMS in assert_cs and deassert_cs, and sets TMS to zero in jlink_spi_send_command. The default option is set to cs=reset for backward compatibility. Tested on macOS 13.3.1 with JLink and Winbond W25Q128 Change-Id: I0cb467fcc2c403a25f260462de0cd020e7022bb1 Signed-off-by: Jiajie Chen <c@jia.je> Reviewed-on: https://review.coreboot.org/c/flashrom/+/75011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Alexander Goncharov <chat@joursoir.net>