mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00
5b997c3ed6
Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
122 lines
3.3 KiB
C
122 lines
3.3 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include "flash.h"
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#include "chipdrivers.h"
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#include "programmer.h"
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#include "spi.h"
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/* Length of half a clock period in usecs. */
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static int bitbang_spi_half_period;
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static const struct bitbang_spi_master *bitbang_spi_master = NULL;
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/* Note that CS# is active low, so val=0 means the chip is active. */
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static void bitbang_spi_set_cs(int val)
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{
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bitbang_spi_master->set_cs(val);
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}
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static void bitbang_spi_set_sck(int val)
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{
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bitbang_spi_master->set_sck(val);
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}
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static void bitbang_spi_set_mosi(int val)
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{
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bitbang_spi_master->set_mosi(val);
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}
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static int bitbang_spi_get_miso(void)
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{
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return bitbang_spi_master->get_miso();
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}
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int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod)
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{
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/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
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* we catch it here. Same goes for missing initialization of bitbanging
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* functions.
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*/
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if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
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!master->set_sck || !master->set_mosi || !master->get_miso) {
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msg_perr("Incomplete bitbanging SPI master setting! Please "
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"report a bug at flashrom@flashrom.org\n");
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return 1;
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}
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bitbang_spi_master = master;
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bitbang_spi_half_period = halfperiod;
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bitbang_spi_set_cs(1);
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bitbang_spi_set_sck(0);
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bitbang_spi_set_mosi(0);
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return 0;
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}
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static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
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{
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uint8_t ret = 0;
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int i;
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for (i = 7; i >= 0; i--) {
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bitbang_spi_set_mosi((val >> i) & 1);
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programmer_delay(bitbang_spi_half_period);
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bitbang_spi_set_sck(1);
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ret <<= 1;
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ret |= bitbang_spi_get_miso();
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programmer_delay(bitbang_spi_half_period);
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bitbang_spi_set_sck(0);
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}
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return ret;
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}
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int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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const unsigned char *writearr, unsigned char *readarr)
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{
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int i;
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bitbang_spi_set_cs(0);
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for (i = 0; i < writecnt; i++)
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bitbang_spi_readwrite_byte(writearr[i]);
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for (i = 0; i < readcnt; i++)
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readarr[i] = bitbang_spi_readwrite_byte(0);
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programmer_delay(bitbang_spi_half_period);
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bitbang_spi_set_cs(1);
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programmer_delay(bitbang_spi_half_period);
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return 0;
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}
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int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
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{
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/* Maximum read length is unlimited, use 64k bytes. */
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return spi_read_chunked(flash, buf, start, len, 64 * 1024);
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}
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int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len)
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{
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return spi_write_chunked(flash, buf, start, len, 256);
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}
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