mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00

Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
179 lines
4.8 KiB
C
179 lines
4.8 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <string.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include <sys/types.h>
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#include "flash.h"
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#include "chipdrivers.h"
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#include "programmer.h"
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static void tolower_string(char *str)
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{
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for (; *str != '\0'; str++)
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*str = (char)tolower((unsigned char)*str);
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}
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int dummy_init(void)
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{
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char *bustext = NULL;
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msg_pspew("%s\n", __func__);
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bustext = extract_programmer_param("bus");
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msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");
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if (!bustext)
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bustext = strdup("parallel+lpc+fwh+spi");
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/* Convert the parameters to lowercase. */
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tolower_string(bustext);
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buses_supported = CHIP_BUSTYPE_NONE;
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if (strstr(bustext, "parallel")) {
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buses_supported |= CHIP_BUSTYPE_PARALLEL;
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msg_pdbg("Enabling support for %s flash.\n", "parallel");
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}
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if (strstr(bustext, "lpc")) {
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buses_supported |= CHIP_BUSTYPE_LPC;
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msg_pdbg("Enabling support for %s flash.\n", "LPC");
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}
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if (strstr(bustext, "fwh")) {
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buses_supported |= CHIP_BUSTYPE_FWH;
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msg_pdbg("Enabling support for %s flash.\n", "FWH");
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}
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if (strstr(bustext, "spi")) {
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buses_supported |= CHIP_BUSTYPE_SPI;
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spi_controller = SPI_CONTROLLER_DUMMY;
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msg_pdbg("Enabling support for %s flash.\n", "SPI");
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}
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if (buses_supported == CHIP_BUSTYPE_NONE)
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msg_pdbg("Support for all flash bus types disabled.\n");
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free(bustext);
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return 0;
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}
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int dummy_shutdown(void)
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{
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msg_pspew("%s\n", __func__);
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return 0;
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}
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void *dummy_map(const char *descr, unsigned long phys_addr, size_t len)
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{
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msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n",
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__func__, descr, (unsigned long)len, phys_addr);
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return (void *)phys_addr;
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}
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void dummy_unmap(void *virt_addr, size_t len)
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{
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msg_pspew("%s: Unmapping 0x%lx bytes at %p\n",
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__func__, (unsigned long)len, virt_addr);
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}
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void dummy_chip_writeb(uint8_t val, chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);
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}
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void dummy_chip_writew(uint16_t val, chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);
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}
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void dummy_chip_writel(uint32_t val, chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);
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}
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void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len)
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{
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size_t i;
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msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",
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__func__, addr, (unsigned long)len);
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for (i = 0; i < len; i++) {
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if ((i % 16) == 0)
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msg_pspew("\n");
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msg_pspew("%02x ", buf[i]);
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}
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}
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uint8_t dummy_chip_readb(const chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr);
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return 0xff;
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}
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uint16_t dummy_chip_readw(const chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr);
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return 0xffff;
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}
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uint32_t dummy_chip_readl(const chipaddr addr)
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{
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msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr);
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return 0xffffffff;
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}
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void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
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{
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msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n",
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__func__, addr, (unsigned long)len);
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memset(buf, 0xff, len);
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return;
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}
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int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
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const unsigned char *writearr, unsigned char *readarr)
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{
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int i;
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msg_pspew("%s:", __func__);
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msg_pspew(" writing %u bytes:", writecnt);
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for (i = 0; i < writecnt; i++)
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msg_pspew(" 0x%02x", writearr[i]);
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msg_pspew(" reading %u bytes:", readcnt);
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for (i = 0; i < readcnt; i++) {
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msg_pspew(" 0xff");
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readarr[i] = 0xff;
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}
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msg_pspew("\n");
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return 0;
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}
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int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
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{
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/* Maximum read length is unlimited, use 64kB. */
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return spi_read_chunked(flash, buf, start, len, 64 * 1024);
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}
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/* Is is impossible to trigger this code path because dummyflasher probing will
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* never be successful, and the current frontend refuses to write in that case.
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* Other frontends may allow writing even for non-detected chips, though.
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*/
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int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len)
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{
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return spi_write_chunked(flash, buf, start, len, 256);
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}
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