mirror of
https://review.coreboot.org/flashrom.git
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40892b0c08
Projects using libflashrom like fwupd expect the user to wait for the operation to complete. To avoid the user thinking the process has "hung" or "got stuck" report back the progress complete of the erase, write and read operations. Add a new --progress flag to the CLI to report progress of operations. Include a test for the dummy spi25 device. TEST=./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus=7 -r /dev/null --progress Change-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c Signed-off-by: Richard Hughes <richard@hughsie.com> Signed-off-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
85 lines
2.4 KiB
C
85 lines
2.4 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2012 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "flash.h"
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#include "chipdrivers.h"
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/*
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* WARNING!
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* This chip uses the standard JEDEC addresses in 16-bit mode as word
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* addresses. In byte mode, 0xAAA has to be used instead of 0x555 and
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* 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC
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* functions.
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*/
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/* chunksize is 1 */
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int write_en29lv640b(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len)
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{
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unsigned int i;
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chipaddr bios = flash->virtual_memory;
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chipaddr dst = flash->virtual_memory + start;
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for (i = 0; i < len; i += 2) {
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chip_writeb(flash, 0xAA, bios + 0xAAA);
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chip_writeb(flash, 0x55, bios + 0x555);
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chip_writeb(flash, 0xA0, bios + 0xAAA);
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/* Transfer data from source to destination. */
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chip_writew(flash, (*src) | ((*(src + 1)) << 8 ), dst);
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toggle_ready_jedec(flash, dst);
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#if 0
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/* We only want to print something in the error case. */
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msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n",
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(dst - bios), chip_readb(flash, dst), *src);
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#endif
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dst += 2;
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src += 2;
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update_progress(flash, FLASHROM_PROGRESS_WRITE, i + 2, len);
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}
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/* FIXME: Ignore errors for now. */
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return 0;
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}
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int probe_en29lv640b(struct flashctx *flash)
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{
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chipaddr bios = flash->virtual_memory;
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uint16_t id1, id2;
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chip_writeb(flash, 0xAA, bios + 0xAAA);
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chip_writeb(flash, 0x55, bios + 0x555);
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chip_writeb(flash, 0x90, bios + 0xAAA);
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programmer_delay(10);
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id1 = chip_readb(flash, bios + 0x200);
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id1 |= (chip_readb(flash, bios) << 8);
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id2 = chip_readb(flash, bios + 0x02);
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chip_writeb(flash, 0xF0, bios + 0xAAA);
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programmer_delay(10);
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msg_cdbg("%s: id1 0x%04x, id2 0x%04x\n", __func__, id1, id2);
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if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id)
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return 1;
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return 0;
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}
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