mirror of
https://review.coreboot.org/flashrom.git
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Before issuing SPI opcodes into 0x61 the top three BITS of 0x60 need to be carefully crafted. Correctly craft these in the case of SPI erasures and document this registers expectations. Clean up remaining debug comments while we are here. BUG=b:152558985,b:148745673 BRANCH=none TEST=flashrom -p realtek_mst_i2c_spi:bus=8 -E && flashrom -p realtek_mst_i2c_spi:bus=8 -r foo && hexdump -C foo Change-Id: Ib11ba8f63b11a1c5ebaa68deb7971648de8c2ecd Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/41079 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
477 lines
13 KiB
C
477 lines
13 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2020 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <time.h>
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#include <errno.h>
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#include "programmer.h"
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#include "spi.h"
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#include "i2c_helper.h"
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#define MCU_I2C_SLAVE_ADDR 0x94
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#define REGISTER_ADDRESS (0x94 >> 1)
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#define PAGE_SIZE 256
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#define MAX_SPI_WAIT_RETRIES 1000
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#define MCU_MODE 0x6F
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#define ENTER_ISP_MODE 0x80
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#define MCU_DATA_PORT 0x70
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#define MAP_PAGE_BYTE2 0x64
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#define MAP_PAGE_BYTE1 0x65
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#define MAP_PAGE_BYTE0 0x66
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//opcodes
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#define OPCODE_READ 3
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#define OPCODE_WRITE 2
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struct realtek_mst_i2c_spi_data {
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int fd;
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};
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static int realtek_mst_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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return SPI_GENERIC_ERROR;
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return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
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}
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static int realtek_mst_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
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{
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i2c_buffer_t data;
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if (i2c_buffer_t_fill(&data, buf, len))
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return SPI_GENERIC_ERROR;
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return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
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}
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static int get_fd_from_context(const struct flashctx *flash)
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{
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if (!flash || !flash->mst || !flash->mst->spi.data) {
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msg_perr("Unable to extract fd from flash context.\n");
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return SPI_GENERIC_ERROR;
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}
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const struct realtek_mst_i2c_spi_data *data =
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(const struct realtek_mst_i2c_spi_data *)flash->mst->spi.data;
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return data->fd;
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}
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static int realtek_mst_i2c_spi_write_register(int fd, uint8_t reg, uint8_t value)
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{
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uint8_t command[] = { reg, value };
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return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
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}
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static int realtek_mst_i2c_spi_read_register(int fd, uint8_t reg, uint8_t *value)
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{
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uint8_t command[] = { reg };
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int ret = realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
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ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
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return ret ? SPI_GENERIC_ERROR : 0;
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}
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static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask)
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{
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uint8_t val;
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int tried = 0;
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int ret = 0;
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do {
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ret |= realtek_mst_i2c_spi_read_register(fd, offset, &val);
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} while (!ret && (val & mask) && ++tried < MAX_SPI_WAIT_RETRIES);
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if (tried == MAX_SPI_WAIT_RETRIES) {
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msg_perr("%s: Time out on sending command.\n", __func__);
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return -MAX_SPI_WAIT_RETRIES;
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}
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return (val & mask) ? SPI_GENERIC_ERROR : ret;
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}
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static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
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{
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int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
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// set internal osc divider register to default to speed up MCU
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// 0x06A0 = 0x74
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x06);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xA0);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x74);
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return ret;
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}
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static int realtek_mst_i2c_spi_reset_mpu(int fd)
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{
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int ret = 0;
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// 0xFFEE[1] = 1;
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uint8_t val = 0;
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ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
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return ret;
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}
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#if 0
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static int realtek_mst_i2c_spi_set_defaults(int fd)
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{
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// 0xFF1B = 0x02;
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int ret = realtek_mst_i2c_spi_write_register(fd, 0x1B, 0x02);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x1C, 0x30);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x1D, 0x1C);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x1E, 0x02);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x1F, 0x00);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x20, 0x1C);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x2C, 0x02);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x2D, 0x00);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x2E, 0x1C);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x62, 0x06);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x6A, 0x03);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x6B, 0x0B);
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ret = realtek_mst_i2c_spi_write_register(fd, 0x6C, 0x00);
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ret = realtek_mst_i2c_spi_write_register(fd, 0xED, 0x88);
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ret = realtek_mst_i2c_spi_write_register(fd, 0xEE, 0x04);
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return ret;
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}
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#endif
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static int realtek_mst_i2c_spi_disable_protection(int fd)
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{
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int ret = 0;
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uint8_t val = 0;
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// 0xAB[2:0] = b001
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
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ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, &val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, (val & 0xF8) | 0x01);
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/* Set pin value to high, 0xFFD7[0] = 1. */
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ret |= realtek_mst_i2c_spi_read_register(fd, 0xD7, &val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0xD7, (val & 0xFE) | 0x01);
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return ret;
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}
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static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
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unsigned int writecnt, unsigned int readcnt,
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const unsigned char *writearr,
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unsigned char *readarr)
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{
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unsigned i;
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int ret = 0;
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if (writecnt > 4 || readcnt > 3 || writecnt == 0) {
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return SPI_GENERIC_ERROR;
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}
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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/* First byte of writearr should be the spi opcode value, followed by the value to write. */
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writecnt--;
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/**
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* Before dispatching a SPI opcode the MCU register 0x60 requires
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* the following configuration byte set:
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*
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* BIT0 - start [0] , end [1].
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* BITS[1-4] - counts.
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* BITS[5-7] - opcode type.
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*
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* | bit7 | bit6 | bit5 |
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* +------+------+------+
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* | 0 | 1 | 0 | ~ JEDEC_RDID,REMS,READ
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* | 0 | 1 | 1 | ~ JEDEC_WRSR
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* | 1 | 0 | 1 | ~ JEDEC_.. erasures.
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*/
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uint8_t ctrl_reg_val = (writecnt << 3) | (readcnt << 1);
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switch (writearr[0]) {
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/* WREN isn't a supported somehow? ignore it. */
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case JEDEC_WREN: return 0;
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/* WRSR requires BIT6 && BIT5 set. */
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case JEDEC_WRSR:
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ctrl_reg_val |= (1 << 5);
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ctrl_reg_val |= (2 << 5);
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break;
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/* Erasures require BIT7 && BIT5 set. */
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case JEDEC_CE_60:
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case JEDEC_CE_C7:
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case JEDEC_BE_52:
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case JEDEC_BE_D8:
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case JEDEC_BE_D7:
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case JEDEC_SE:
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ctrl_reg_val |= (1 << 5);
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ctrl_reg_val |= (4 << 5);
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break;
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default:
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/* Otherwise things like RDID,REMS,READ require BIT6 */
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ctrl_reg_val |= (2 << 5);
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}
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */
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for (i = 0; i < writecnt; ++i)
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1);
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if (ret)
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return ret;
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ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01);
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if (ret)
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return ret;
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for (i = 0; i < readcnt; ++i)
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ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]);
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return ret;
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}
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static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx)
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{
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int ret = 0;
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
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return ret ? SPI_GENERIC_ERROR : 0;
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}
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static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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unsigned i;
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int ret = 0;
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if (start & 0xff)
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return default_spi_read(flash, buf, start, len);
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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start--;
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ);
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uint8_t block_idx = start >> 16;
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uint8_t page_idx = start >> 8;
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uint8_t byte_idx = start;
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ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
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if (ret)
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return ret;
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ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01);
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if (ret)
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return ret;
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/**
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* The first byte is just a null, probably a status code?
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* Advance the read by a offset of one byte and continue.
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*/
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uint8_t dummy;
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realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
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for (i = 0; i < len; i += PAGE_SIZE) {
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ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,
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buf + i, min(len - i, PAGE_SIZE));
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if (ret)
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return ret;
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}
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return ret;
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}
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static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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unsigned i;
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int ret = 0;
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if (start & 0xff)
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return default_spi_write_256(flash, buf, start, len);
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int fd = get_fd_from_context(flash);
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if (fd < 0)
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return SPI_GENERIC_ERROR;
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ret = realtek_mst_i2c_spi_disable_protection(fd);
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if (ret)
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return ret;
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start--;
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_WRITE);
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uint8_t block_idx = start >> 16;
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uint8_t page_idx = start >> 8;
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uint8_t byte_idx = start;
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ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
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ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
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if (ret)
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goto fail;
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ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01);
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if (ret)
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goto fail;
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for (i = 0; i < len; i += PAGE_SIZE) {
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ret |= realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS,
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(uint8_t *)buf + i, min(len - i, PAGE_SIZE));
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if (ret)
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break;
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}
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fail:
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/* TODO: re-enable the write protection? */
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return ret;
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}
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static int realtek_mst_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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msg_perr("%s: AAI write function is not supported.\n", __func__);
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return SPI_GENERIC_ERROR;
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}
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static struct spi_master spi_master_i2c_realtek_mst = {
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.max_data_read = 16,
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.max_data_write = 8,
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.command = realtek_mst_i2c_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = realtek_mst_i2c_spi_read,
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.write_256 = realtek_mst_i2c_spi_write_256,
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.write_aai = realtek_mst_i2c_spi_write_aai,
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};
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static int realtek_mst_i2c_spi_shutdown(void *data)
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{
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int ret = 0;
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struct realtek_mst_i2c_spi_data *realtek_mst_data =
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(struct realtek_mst_i2c_spi_data *)data;
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int fd = realtek_mst_data->fd;
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ret |= realtek_mst_i2c_spi_reset_mpu(fd);
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i2c_close(fd);
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free(data);
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return ret;
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}
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static int get_params(int *i2c_bus)
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{
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char *bus_str = NULL;
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int ret = SPI_GENERIC_ERROR;
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bus_str = extract_programmer_param("bus");
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if (bus_str) {
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char *bus_suffix;
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errno = 0;
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int bus = (int)strtol(bus_str, &bus_suffix, 10);
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if (errno != 0 || bus_str == bus_suffix) {
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msg_perr("%s: Could not convert 'bus'.\n", __func__);
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goto get_params_done;
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}
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if (bus < 0 || bus > 255) {
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msg_perr("%s: Value for 'bus' is out of range(0-255).\n", __func__);
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goto get_params_done;
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}
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if (strlen(bus_suffix) > 0) {
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msg_perr("%s: Garbage following 'bus' value.\n", __func__);
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goto get_params_done;
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}
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msg_pinfo("Using i2c bus %i.\n", bus);
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*i2c_bus = bus;
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ret = 0;
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goto get_params_done;
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} else {
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msg_perr("%s: Bus number not specified.\n", __func__);
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}
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get_params_done:
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if (bus_str)
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free(bus_str);
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|
return ret;
|
|
}
|
|
|
|
int realtek_mst_i2c_spi_init(void)
|
|
{
|
|
int ret = 0;
|
|
int i2c_bus = 0;
|
|
|
|
if (get_params(&i2c_bus))
|
|
return SPI_GENERIC_ERROR;
|
|
|
|
int fd = i2c_open(i2c_bus, REGISTER_ADDRESS, 0);
|
|
if (fd < 0)
|
|
return fd;
|
|
|
|
/* Ensure we are in a known state before entering ISP mode */
|
|
ret |= realtek_mst_i2c_spi_reset_mpu(fd);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret |= realtek_mst_i2c_spi_enter_isp_mode(fd);
|
|
if (ret)
|
|
return ret;
|
|
// XXX: maybe make into a mode:defaults cli param?
|
|
#if 0
|
|
ret |= realtek_mst_i2c_spi_set_defaults(fd);
|
|
if (ret)
|
|
return ret;
|
|
#endif
|
|
|
|
struct realtek_mst_i2c_spi_data *data = calloc(1, sizeof(struct realtek_mst_i2c_spi_data));
|
|
if (!data) {
|
|
msg_perr("Unable to allocate space for extra SPI master data.\n");
|
|
return SPI_GENERIC_ERROR;
|
|
}
|
|
|
|
data->fd = fd;
|
|
ret |= register_shutdown(realtek_mst_i2c_spi_shutdown, data);
|
|
|
|
spi_master_i2c_realtek_mst.data = data;
|
|
ret |= register_spi_master(&spi_master_i2c_realtek_mst);
|
|
|
|
return ret;
|
|
}
|