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829c0e4e6a
Change-Id: Iaa222f9f265e019798aada4d556c484cb3b46b5d Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/89522 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jean THOMAS <virgule@jeanthomas.me> Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
111 lines
2.6 KiB
C
111 lines
2.6 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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* SPDX-FileCopyrightText: 2009 Joerg Fischer <turboj@web.de>
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*/
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#include <stdlib.h>
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#include "flash.h"
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#include "programmer.h"
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#include "hwaccess_physmap.h"
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#include "pcidev.h"
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#define PCI_VENDOR_ID_DRKAISER 0x1803
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#define PCI_MAGIC_DRKAISER_ADDR 0x50
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#define PCI_MAGIC_DRKAISER_VALUE 0xa971
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#define DRKAISER_MEMMAP_SIZE (1024 * 128)
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/* Mask to restrict flash accesses to the 128kB memory window. */
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#define DRKAISER_MEMMAP_MASK ((1 << 17) - 1)
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struct drkaiser_data {
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struct pci_dev *dev;
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uint8_t *bar;
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uint16_t flash_access;
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};
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static const struct dev_entry drkaiser_pcidev[] = {
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{0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
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{0},
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};
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static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
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chipaddr addr)
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{
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struct drkaiser_data *data = flash->mst->par.data;
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pci_mmio_writeb(val, data->bar + (addr & DRKAISER_MEMMAP_MASK));
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}
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static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
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const chipaddr addr)
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{
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struct drkaiser_data *data = flash->mst->par.data;
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return pci_mmio_readb(data->bar + (addr & DRKAISER_MEMMAP_MASK));
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}
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static int drkaiser_shutdown(void *par_data)
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{
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struct drkaiser_data *data = par_data;
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/* Restore original flash writing state. */
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pci_write_word(data->dev, PCI_MAGIC_DRKAISER_ADDR, data->flash_access);
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free(par_data);
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return 0;
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}
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static const struct par_master par_master_drkaiser = {
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.chip_readb = drkaiser_chip_readb,
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.chip_writeb = drkaiser_chip_writeb,
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.shutdown = drkaiser_shutdown,
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};
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static int drkaiser_init(const struct programmer_cfg *cfg)
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{
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struct pci_dev *dev = NULL;
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uint32_t addr;
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uint8_t *bar;
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dev = pcidev_init(cfg, drkaiser_pcidev, PCI_BASE_ADDRESS_2);
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if (!dev)
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return 1;
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addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2);
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if (!addr)
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return 1;
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/* Map 128kB flash memory window. */
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bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE);
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if (bar == ERROR_PTR)
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return 1;
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struct drkaiser_data *data = calloc(1, sizeof(*data));
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if (!data) {
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msg_perr("Unable to allocate space for PAR master data\n");
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return 1;
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}
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data->dev = dev;
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data->bar = bar;
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/* Write magic register to enable flash write. */
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data->flash_access = pci_read_word(dev, PCI_MAGIC_DRKAISER_ADDR);
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pci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
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max_rom_decode.parallel = 128 * 1024;
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return register_par_master(&par_master_drkaiser, BUS_PARALLEL, data);
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}
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const struct programmer_entry programmer_drkaiser = {
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.name = "drkaiser",
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.type = PCI,
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.devs.dev = drkaiser_pcidev,
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.init = drkaiser_init,
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};
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