mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-28 23:43:42 +02:00
5820f42ef2
Use chipaddr instead of volatile uint8_t * because when we access chips
in external flashers, they are not accessed via pointers at all.
Benefits: This allows us to differentiate between volatile machine
memory accesses and flash chip accesses. It also enforces usage
of chip_{read,write}[bwl] to access flash chips, so nobody will
unintentionally use pointers to access chips anymore. Some unneeded
casts are removed as well. Grepping for chip operations and machine
memory operations doesn't yield any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Corresponding to flashrom svn r519.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009 Peter Stuge <peter@stuge.se>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "flash.h"
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int erase_m29f002(struct flashchip *flash)
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{
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chipaddr bios = flash->virtual_memory;
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chip_writeb(0xaa, bios + 0x555);
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chip_writeb(0x55, bios + 0xaaa);
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chip_writeb(0x80, bios + 0x555);
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chip_writeb(0xaa, bios + 0x555);
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chip_writeb(0x55, bios + 0xaaa);
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chip_writeb(0x10, bios + 0x555);
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myusec_delay(10);
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toggle_ready_jedec(bios);
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return 0;
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}
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static void rewrite_block(chipaddr bios, uint8_t *src,
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chipaddr dst, int size)
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{
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/* erase */
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chip_writeb(0xaa, bios + 0x555);
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chip_writeb(0x55, bios + 0xaaa);
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chip_writeb(0x80, bios + 0x555);
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chip_writeb(0xaa, bios + 0x555);
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chip_writeb(0x55, bios + 0xaaa);
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chip_writeb(0x30, dst);
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myusec_delay(10);
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toggle_ready_jedec(bios);
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/* program */
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while (size--) {
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chip_writeb(0xaa, bios + 0x555);
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chip_writeb(0x55, bios + 0xaaa);
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chip_writeb(0xa0, bios + 0x555);
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chip_writeb(*src, dst);
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toggle_ready_jedec(dst);
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dst++;
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src++;
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}
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}
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static void do_block(chipaddr bios, uint8_t *src, int i,
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unsigned long start, int size)
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{
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printf("%d at address: 0x%08lx", i, start);
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rewrite_block(bios, src + start, bios + start, size);
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printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
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}
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int write_m29f002t(struct flashchip *flash, uint8_t *buf)
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{
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int i, page_size = flash->page_size;
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chipaddr bios = flash->virtual_memory;
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/* M29F002(N)T has 7 blocks. From bottom to top their sizes are:
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* 64k 64k 64k 32k 8k 8k 16k
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* flash->page_size is set to 64k in flashchips.c
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*/
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printf("Programming block: ");
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for (i = 0; i < 3; i++)
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do_block(bios, buf, i, i * page_size, page_size);
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do_block(bios, buf, i++, 0x30000, 32 * 1024);
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do_block(bios, buf, i++, 0x38000, 8 * 1024);
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do_block(bios, buf, i++, 0x3a000, 8 * 1024);
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do_block(bios, buf, i, 0x3c000, 16 * 1024);
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printf("\n");
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return 0;
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}
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int write_m29f002b(struct flashchip *flash, uint8_t *buf)
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{
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int i = 0, page_size = flash->page_size;
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chipaddr bios = flash->virtual_memory;
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/* M29F002B has 7 blocks. From bottom to top their sizes are:
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* 16k 8k 8k 32k 64k 64k 64k
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* flash->page_size is set to 64k in flashchips.c
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*/
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printf("Programming block: ");
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do_block(bios, buf, i++, 0x00000, 16 * 1024);
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do_block(bios, buf, i++, 0x04000, 8 * 1024);
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do_block(bios, buf, i++, 0x06000, 8 * 1024);
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do_block(bios, buf, i++, 0x08000, 32 * 1024);
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for (; i < 7; i++)
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do_block(bios, buf, i, (i - 3) * page_size, page_size);
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printf("\n");
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return 0;
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}
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