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Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
212 lines
6.1 KiB
C
212 lines
6.1 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2008 Peter Stuge <peter@stuge.se>
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* Copyright (C) 2009,2010 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#if defined(__i386__) || defined(__x86_64__)
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#include "flash.h"
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#include "chipdrivers.h"
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#include "programmer.h"
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#include "hwaccess.h"
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#include "spi.h"
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#define WBSIO_PORT1 0x2e
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#define WBSIO_PORT2 0x4e
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static uint16_t wbsio_spibase = 0;
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static uint16_t wbsio_get_spibase(uint16_t port)
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{
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uint8_t id;
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uint16_t flashport = 0;
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w836xx_ext_enter(port);
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id = sio_read(port, 0x20);
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if (id != 0xa0) {
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msg_perr("\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
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goto done;
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}
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if (0 == (sio_read(port, 0x24) & 2)) {
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msg_perr("\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
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goto done;
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}
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sio_write(port, 0x07, 0x06);
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if (0 == (sio_read(port, 0x30) & 1)) {
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msg_perr("\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
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goto done;
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}
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flashport = (sio_read(port, 0x62) << 8) | sio_read(port, 0x63);
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done:
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w836xx_ext_leave(port);
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return flashport;
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}
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static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
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unsigned int readcnt,
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const unsigned char *writearr,
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unsigned char *readarr);
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static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
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unsigned int start, unsigned int len);
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static const struct spi_master spi_master_wbsio = {
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.type = SPI_CONTROLLER_WBSIO,
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.max_data_read = MAX_DATA_UNSPECIFIED,
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.max_data_write = MAX_DATA_UNSPECIFIED,
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.command = wbsio_spi_send_command,
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.multicommand = default_spi_send_multicommand,
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.read = wbsio_spi_read,
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.write_256 = spi_chip_write_1,
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.write_aai = default_spi_write_aai,
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};
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int wbsio_check_for_spi(void)
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{
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if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
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if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
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return 1;
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msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
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msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
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"1024 kB!\n", __func__);
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max_rom_decode.spi = 1024 * 1024;
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register_spi_master(&spi_master_wbsio);
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return 0;
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}
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/* W83627DHG has 11 command modes:
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* 1=1 command only
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* 2=1 command+1 data write
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* 3=1 command+2 data read
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* 4=1 command+3 address
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* 5=1 command+3 address+1 data write
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* 6=1 command+3 address+4 data write
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* 7=1 command+3 address+1 dummy address inserted by wbsio+4 data read
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* 8=1 command+3 address+1 data read
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* 9=1 command+3 address+2 data read
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* a=1 command+3 address+3 data read
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* b=1 command+3 address+4 data read
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*
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* mode[7:4] holds the command mode
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* mode[3:0] holds SPI address bits [19:16]
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*
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* The Winbond SPI master only supports 20 bit addresses on the SPI bus. :\
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* Would one more byte of RAM in the chip (to get all 24 bits) really make
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* such a big difference?
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*/
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static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
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unsigned int readcnt,
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const unsigned char *writearr,
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unsigned char *readarr)
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{
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int i;
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uint8_t mode = 0;
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msg_pspew("%s:", __func__);
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if (1 == writecnt && 0 == readcnt) {
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mode = 0x10;
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} else if (2 == writecnt && 0 == readcnt) {
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OUTB(writearr[1], wbsio_spibase + 4);
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msg_pspew(" data=0x%02x", writearr[1]);
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mode = 0x20;
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} else if (1 == writecnt && 2 == readcnt) {
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mode = 0x30;
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} else if (4 == writecnt && 0 == readcnt) {
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msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
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for (i = 2; i < writecnt; i++) {
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew("%02x", writearr[i]);
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}
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mode = 0x40 | (writearr[1] & 0x0f);
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} else if (5 == writecnt && 0 == readcnt) {
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msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
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for (i = 2; i < 4; i++) {
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew("%02x", writearr[i]);
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}
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew(" data=0x%02x", writearr[i]);
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mode = 0x50 | (writearr[1] & 0x0f);
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} else if (8 == writecnt && 0 == readcnt) {
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msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
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for (i = 2; i < 4; i++) {
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew("%02x", writearr[i]);
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}
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msg_pspew(" data=0x");
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for (; i < writecnt; i++) {
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew("%02x", writearr[i]);
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}
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mode = 0x60 | (writearr[1] & 0x0f);
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} else if (5 == writecnt && 4 == readcnt) {
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/* XXX: TODO not supported by flashrom infrastructure!
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* This mode, 7, discards the fifth byte in writecnt,
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* but since we can not express that in flashrom, fail
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* the operation for now.
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*/
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;
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} else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) {
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msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
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for (i = 2; i < writecnt; i++) {
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OUTB(writearr[i], wbsio_spibase + i);
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msg_pspew("%02x", writearr[i]);
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}
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mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f);
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}
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msg_pspew(" cmd=%02x mode=%02x\n", writearr[0], mode);
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if (!mode) {
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msg_perr("%s: unsupported command type wr=%d rd=%d\n",
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__func__, writecnt, readcnt);
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/* Command type refers to the number of bytes read/written. */
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return SPI_INVALID_LENGTH;
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}
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OUTB(writearr[0], wbsio_spibase);
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OUTB(mode, wbsio_spibase + 1);
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programmer_delay(10);
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if (!readcnt)
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return 0;
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msg_pspew("%s: returning data =", __func__);
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for (i = 0; i < readcnt; i++) {
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readarr[i] = INB(wbsio_spibase + 4 + i);
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msg_pspew(" 0x%02x", readarr[i]);
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}
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msg_pspew("\n");
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return 0;
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}
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static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
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unsigned int start, unsigned int len)
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{
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mmio_readn((void *)(flash->virtual_memory + start), buf, len);
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return 0;
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}
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#endif
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