mirror of
https://review.coreboot.org/flashrom.git
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All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
514 lines
14 KiB
C
514 lines
14 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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* Copyright (C) 2007 Carl-Daniel Hailfinger
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* Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "flash.h"
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#define MAX_REFLASH_TRIES 0x10
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#define MASK_FULL 0xffff
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#define MASK_2AA 0x7ff
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#define MASK_AAA 0xfff
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/* Check one byte for odd parity */
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uint8_t oddparity(uint8_t val)
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{
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val = (val ^ (val >> 4)) & 0xf;
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val = (val ^ (val >> 2)) & 0x3;
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return (val ^ (val >> 1)) & 0x1;
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}
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static void toggle_ready_jedec_common(const struct flashctx *flash,
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chipaddr dst, int delay)
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{
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unsigned int i = 0;
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uint8_t tmp1, tmp2;
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tmp1 = chip_readb(flash, dst) & 0x40;
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while (i++ < 0xFFFFFFF) {
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if (delay)
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programmer_delay(delay);
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tmp2 = chip_readb(flash, dst) & 0x40;
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if (tmp1 == tmp2) {
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break;
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}
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tmp1 = tmp2;
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}
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if (i > 0x100000)
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msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
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}
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void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst)
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{
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toggle_ready_jedec_common(flash, dst, 0);
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}
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/* Some chips require a minimum delay between toggle bit reads.
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* The Winbond W39V040C wants 50 ms between reads on sector erase toggle,
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* but experiments show that 2 ms are already enough. Pick a safety factor
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* of 4 and use an 8 ms delay.
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* Given that erase is slow on all chips, it is recommended to use
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* toggle_ready_jedec_slow in erase functions.
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*/
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static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst)
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{
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toggle_ready_jedec_common(flash, dst, 8 * 1000);
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}
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void data_polling_jedec(const struct flashctx *flash, chipaddr dst,
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uint8_t data)
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{
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unsigned int i = 0;
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uint8_t tmp;
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data &= 0x80;
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while (i++ < 0xFFFFFFF) {
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tmp = chip_readb(flash, dst) & 0x80;
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if (tmp == data) {
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break;
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}
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}
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if (i > 0x100000)
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msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
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}
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static unsigned int getaddrmask(struct flashctx *flash)
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{
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switch (flash->feature_bits & FEATURE_ADDR_MASK) {
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case FEATURE_ADDR_FULL:
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return MASK_FULL;
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break;
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case FEATURE_ADDR_2AA:
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return MASK_2AA;
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break;
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case FEATURE_ADDR_AAA:
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return MASK_AAA;
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break;
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default:
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msg_cerr("%s called with unknown mask\n", __func__);
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return 0;
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break;
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}
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}
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static void start_program_jedec_common(struct flashctx *flash,
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unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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chip_writeb(flash, 0xA0, bios + (0x5555 & mask));
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}
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static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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uint8_t id1, id2;
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uint32_t largeid1, largeid2;
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uint32_t flashcontent1, flashcontent2;
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int probe_timing_enter, probe_timing_exit;
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if (flash->probe_timing > 0)
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probe_timing_enter = probe_timing_exit = flash->probe_timing;
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else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
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probe_timing_enter = probe_timing_exit = 0;
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} else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
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msg_cdbg("Chip lacks correct probe timing information, "
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"using default 10mS/40uS. ");
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probe_timing_enter = 10000;
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probe_timing_exit = 40;
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} else {
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msg_cerr("Chip has negative value in probe_timing, failing "
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"without chip access\n");
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return 0;
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}
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/* Earlier probes might have been too fast for the chip to enter ID
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* mode completely. Allow the chip to finish this before seeing a
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* reset command.
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*/
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if (probe_timing_enter)
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programmer_delay(probe_timing_enter);
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/* Reset chip to a clean slate */
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if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
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{
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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}
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chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(probe_timing_exit);
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/* Issue JEDEC Product ID Entry command */
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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if (probe_timing_enter)
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programmer_delay(10);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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if (probe_timing_enter)
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programmer_delay(10);
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chip_writeb(flash, 0x90, bios + (0x5555 & mask));
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if (probe_timing_enter)
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programmer_delay(probe_timing_enter);
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/* Read product ID */
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id1 = chip_readb(flash, bios);
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id2 = chip_readb(flash, bios + 0x01);
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largeid1 = id1;
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largeid2 = id2;
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/* Check if it is a continuation ID, this should be a while loop. */
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if (id1 == 0x7F) {
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largeid1 <<= 8;
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id1 = chip_readb(flash, bios + 0x100);
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largeid1 |= id1;
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}
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if (id2 == 0x7F) {
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largeid2 <<= 8;
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id2 = chip_readb(flash, bios + 0x101);
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largeid2 |= id2;
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}
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/* Issue JEDEC Product ID Exit command */
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if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
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{
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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}
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chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(probe_timing_exit);
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msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
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if (!oddparity(id1))
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msg_cdbg(", id1 parity violation");
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/* Read the product ID location again. We should now see normal flash contents. */
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flashcontent1 = chip_readb(flash, bios);
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flashcontent2 = chip_readb(flash, bios + 0x01);
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/* Check if it is a continuation ID, this should be a while loop. */
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if (flashcontent1 == 0x7F) {
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flashcontent1 <<= 8;
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flashcontent1 |= chip_readb(flash, bios + 0x100);
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}
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if (flashcontent2 == 0x7F) {
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flashcontent2 <<= 8;
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flashcontent2 |= chip_readb(flash, bios + 0x101);
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}
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if (largeid1 == flashcontent1)
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msg_cdbg(", id1 is normal flash content");
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if (largeid2 == flashcontent2)
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msg_cdbg(", id2 is normal flash content");
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msg_cdbg("\n");
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if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id)
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return 0;
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if (flash->feature_bits & FEATURE_REGISTERMAP)
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map_flash_registers(flash);
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return 1;
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}
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static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
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unsigned int pagesize, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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int delay_us = 0;
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if(flash->probe_timing != TIMING_ZERO)
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delay_us = 10;
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/* Issue the Sector Erase command */
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x80, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x30, bios + page);
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programmer_delay(delay_us);
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/* wait for Toggle bit ready */
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toggle_ready_jedec_slow(flash, bios);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
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unsigned int blocksize, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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int delay_us = 0;
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if(flash->probe_timing != TIMING_ZERO)
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delay_us = 10;
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/* Issue the Sector Erase command */
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x80, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x50, bios + block);
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programmer_delay(delay_us);
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/* wait for Toggle bit ready */
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toggle_ready_jedec_slow(flash, bios);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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int delay_us = 0;
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if(flash->probe_timing != TIMING_ZERO)
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delay_us = 10;
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/* Issue the JEDEC Chip Erase command */
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x80, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
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programmer_delay(delay_us);
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chip_writeb(flash, 0x10, bios + (0x5555 & mask));
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programmer_delay(delay_us);
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toggle_ready_jedec_slow(flash, bios);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
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chipaddr dst, unsigned int mask)
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{
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int tried = 0, failed = 0;
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chipaddr bios = flash->virtual_memory;
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/* If the data is 0xFF, don't program it and don't complain. */
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if (*src == 0xFF) {
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return 0;
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}
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retry:
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/* Issue JEDEC Byte Program command */
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start_program_jedec_common(flash, mask);
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/* transfer data from source to destination */
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chip_writeb(flash, *src, dst);
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toggle_ready_jedec(flash, bios);
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if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) {
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goto retry;
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}
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if (tried >= MAX_REFLASH_TRIES)
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failed = 1;
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return failed;
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}
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/* chunksize is 1 */
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int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start,
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unsigned int len)
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{
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int i, failed = 0;
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chipaddr dst = flash->virtual_memory + start;
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chipaddr olddst;
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unsigned int mask;
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mask = getaddrmask(flash);
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olddst = dst;
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for (i = 0; i < len; i++) {
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if (write_byte_program_jedec_common(flash, src, dst, mask))
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failed = 1;
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dst++, src++;
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}
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if (failed)
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msg_cerr(" writing sector at 0x%lx failed!\n", olddst);
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return failed;
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}
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int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src,
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unsigned int start, unsigned int page_size)
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{
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int i, tried = 0, failed;
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uint8_t *s = src;
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chipaddr bios = flash->virtual_memory;
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chipaddr dst = bios + start;
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chipaddr d = dst;
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unsigned int mask;
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mask = getaddrmask(flash);
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retry:
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/* Issue JEDEC Start Program command */
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start_program_jedec_common(flash, mask);
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/* transfer data from source to destination */
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for (i = 0; i < page_size; i++) {
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/* If the data is 0xFF, don't program it */
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if (*src != 0xFF)
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chip_writeb(flash, *src, dst);
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dst++;
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src++;
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}
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toggle_ready_jedec(flash, dst - 1);
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dst = d;
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src = s;
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failed = verify_range(flash, src, start, page_size, NULL);
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if (failed && tried++ < MAX_REFLASH_TRIES) {
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msg_cerr("retrying.\n");
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goto retry;
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}
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if (failed) {
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msg_cerr(" page 0x%lx failed!\n",
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(d - bios) / page_size);
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}
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return failed;
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}
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/* chunksize is page_size */
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/*
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* Write a part of the flash chip.
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* FIXME: Use the chunk code from Michael Karcher instead.
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* This function is a slightly modified copy of spi_write_chunked.
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* Each page is written separately in chunks with a maximum size of chunksize.
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*/
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int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start,
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int unsigned len)
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{
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unsigned int i, starthere, lenhere;
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/* FIXME: page_size is the wrong variable. We need max_writechunk_size
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* in struct flashctx to do this properly. All chips using
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* write_jedec have page_size set to max_writechunk_size, so
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* we're OK for now.
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*/
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unsigned int page_size = flash->page_size;
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/* Warning: This loop has a very unusual condition and body.
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* The loop needs to go through each page with at least one affected
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* byte. The lowest page number is (start / page_size) since that
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* division rounds down. The highest page number we want is the page
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* where the last byte of the range lives. That last byte has the
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* address (start + len - 1), thus the highest page number is
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* (start + len - 1) / page_size. Since we want to include that last
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* page as well, the loop condition uses <=.
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*/
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for (i = start / page_size; i <= (start + len - 1) / page_size; i++) {
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/* Byte position of the first byte in the range in this page. */
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/* starthere is an offset to the base address of the chip. */
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starthere = max(start, i * page_size);
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/* Length of bytes in the range in this page. */
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lenhere = min(start + len, (i + 1) * page_size) - starthere;
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if (write_page_write_jedec_common(flash, buf + starthere - start, starthere, lenhere))
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return 1;
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}
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return 0;
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}
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/* erase chip with block_erase() prototype */
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int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr,
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unsigned int blocksize)
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{
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unsigned int mask;
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mask = getaddrmask(flash);
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if ((addr != 0) || (blocksize != flash->total_size * 1024)) {
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msg_cerr("%s called with incorrect arguments\n",
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__func__);
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return -1;
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}
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return erase_chip_jedec_common(flash, mask);
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}
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int probe_jedec(struct flashctx *flash)
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{
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unsigned int mask;
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mask = getaddrmask(flash);
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return probe_jedec_common(flash, mask);
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}
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int erase_sector_jedec(struct flashctx *flash, unsigned int page,
|
|
unsigned int size)
|
|
{
|
|
unsigned int mask;
|
|
|
|
mask = getaddrmask(flash);
|
|
return erase_sector_jedec_common(flash, page, size, mask);
|
|
}
|
|
|
|
int erase_block_jedec(struct flashctx *flash, unsigned int page,
|
|
unsigned int size)
|
|
{
|
|
unsigned int mask;
|
|
|
|
mask = getaddrmask(flash);
|
|
return erase_block_jedec_common(flash, page, size, mask);
|
|
}
|
|
|
|
int erase_chip_jedec(struct flashctx *flash)
|
|
{
|
|
unsigned int mask;
|
|
|
|
mask = getaddrmask(flash);
|
|
return erase_chip_jedec_common(flash, mask);
|
|
}
|