mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 22:52:34 +02:00

Not all chips follow the same pattern. There are differences in how CMP bit is treated or in block size used. Change-Id: Ied7b27be2ee2426af8f473432e2b01a290de2365 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66212 Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
572 lines
16 KiB
C
572 lines
16 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2010 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "flash.h"
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#include "libflashrom.h"
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#include "chipdrivers.h"
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#include "writeprotect.h"
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#include "programmer.h"
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/*
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* Allow specialisation in opaque masters, such as ichspi hwseq, to r/w to status registers.
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*/
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static int wp_write_register(const struct flashctx *flash, enum flash_reg reg, uint8_t value)
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{
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if ((flash->mst->buses_supported & BUS_PROG) && flash->mst->opaque.write_register) {
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return flash->mst->opaque.write_register(flash, reg, value);
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}
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return spi_write_register(flash, reg, value);
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}
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static int wp_read_register(const struct flashctx *flash, enum flash_reg reg, uint8_t *value)
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{
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if ((flash->mst->buses_supported & BUS_PROG) && flash->mst->opaque.read_register) {
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return flash->mst->opaque.read_register(flash, reg, value);
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}
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return spi_read_register(flash, reg, value);
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}
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/** Read and extract a single bit from the chip's registers */
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static enum flashrom_wp_result read_bit(uint8_t *value, bool *present, struct flashctx *flash, struct reg_bit_info bit)
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{
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*present = bit.reg != INVALID_REG;
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if (*present) {
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if (wp_read_register(flash, bit.reg, value))
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return FLASHROM_WP_ERR_READ_FAILED;
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*value = (*value >> bit.bit_index) & 1;
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} else {
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/* Zero bit, it may be used by compare_ranges(). */
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*value = 0;
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}
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return FLASHROM_WP_OK;
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}
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/** Read all WP configuration bits from the chip's registers. */
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static enum flashrom_wp_result read_wp_bits(struct wp_bits *bits, struct flashctx *flash)
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{
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/*
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* For each WP bit that is included in the chip's register layout, read
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* the register that contains it, extracts the bit's value, and assign
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* it to the appropriate field in the wp_bits structure.
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*/
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const struct reg_bit_map *bit_map = &flash->chip->reg_bits;
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bool ignored;
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size_t i;
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enum flashrom_wp_result ret;
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/*
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* Write protection select bit (WPS) controls kind of write protection
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* that is used by the chip. When set, BP bits are ignored and each
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* block/sector has its own WP bit managed by special commands. When
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* the bit is set and we can't change it, just bail out until
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* implementation is extended to handle this kind of WP.
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*/
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if (bit_map->wps.reg != INVALID_REG && bit_map->wps.writability != RW) {
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bool wps_bit_present;
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uint8_t wps;
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ret = read_bit(&wps, &wps_bit_present, flash, bit_map->wps);
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if (ret != FLASHROM_WP_OK)
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return ret;
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if (wps_bit_present && wps)
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return FLASHROM_WP_ERR_UNSUPPORTED_STATE;
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}
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ret = read_bit(&bits->tb, &bits->tb_bit_present, flash, bit_map->tb);
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if (ret != FLASHROM_WP_OK)
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return ret;
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ret = read_bit(&bits->sec, &bits->sec_bit_present, flash, bit_map->sec);
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if (ret != FLASHROM_WP_OK)
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return ret;
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ret = read_bit(&bits->cmp, &bits->cmp_bit_present, flash, bit_map->cmp);
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if (ret != FLASHROM_WP_OK)
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return ret;
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ret = read_bit(&bits->srp, &bits->srp_bit_present, flash, bit_map->srp);
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if (ret != FLASHROM_WP_OK)
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return ret;
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ret = read_bit(&bits->srl, &bits->srl_bit_present, flash, bit_map->srl);
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if (ret != FLASHROM_WP_OK)
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return ret;
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for (i = 0; i < ARRAY_SIZE(bits->bp); i++) {
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if (bit_map->bp[i].reg == INVALID_REG)
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break;
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bits->bp_bit_count = i + 1;
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ret = read_bit(&bits->bp[i], &ignored, flash, bit_map->bp[i]);
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if (ret != FLASHROM_WP_OK)
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return ret;
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}
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return ret;
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}
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/** Helper function for write_wp_bits(). */
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static void set_reg_bit(
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uint8_t *reg_values, uint8_t *bit_masks, uint8_t *write_masks,
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struct reg_bit_info bit, uint8_t value)
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{
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if (bit.reg != INVALID_REG) {
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reg_values[bit.reg] |= value << bit.bit_index;
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bit_masks[bit.reg] |= 1 << bit.bit_index;
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/* Avoid RO and OTP bits causing a register update */
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if (bit.writability == RW)
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write_masks[bit.reg] |= 1 << bit.bit_index;
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}
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}
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/** Write WP configuration bits to the flash's registers. */
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static enum flashrom_wp_result write_wp_bits(struct flashctx *flash, struct wp_bits bits)
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{
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size_t i;
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const struct reg_bit_map *reg_bits = &flash->chip->reg_bits;
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/* Convert wp_bits to register values and masks */
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uint8_t reg_values[MAX_REGISTERS] = {0};
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uint8_t bit_masks[MAX_REGISTERS] = {0}; /* masks of valid bits */
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uint8_t write_masks[MAX_REGISTERS] = {0}; /* masks of written bits */
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for (i = 0; i < bits.bp_bit_count; i++)
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->bp[i], bits.bp[i]);
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->tb, bits.tb);
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->sec, bits.sec);
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->cmp, bits.cmp);
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->srp, bits.srp);
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->srl, bits.srl);
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/* Note: always setting WPS bit to zero until its fully supported. */
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set_reg_bit(reg_values, bit_masks, write_masks, reg_bits->wps, 0);
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/* Write each register whose value was updated */
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for (enum flash_reg reg = STATUS1; reg < MAX_REGISTERS; reg++) {
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if (!write_masks[reg])
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continue;
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uint8_t value;
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if (wp_read_register(flash, reg, &value))
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return FLASHROM_WP_ERR_READ_FAILED;
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/* Skip unnecessary register writes */
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uint8_t actual = value & write_masks[reg];
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uint8_t expected = reg_values[reg] & write_masks[reg];
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if (actual == expected)
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continue;
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value = (value & ~write_masks[reg]) | expected;
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if (wp_write_register(flash, reg, value))
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return FLASHROM_WP_ERR_WRITE_FAILED;
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}
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enum flashrom_wp_result ret = FLASHROM_WP_OK;
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/* Verify each register even if write to it was skipped */
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for (enum flash_reg reg = STATUS1; reg < MAX_REGISTERS; reg++) {
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if (!bit_masks[reg])
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continue;
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uint8_t value;
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if (wp_read_register(flash, reg, &value))
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return FLASHROM_WP_ERR_READ_FAILED;
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msg_cdbg2("%s: wp_verify reg:%u value:0x%x\n", __func__, reg, value);
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uint8_t actual = value & bit_masks[reg];
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uint8_t expected = reg_values[reg] & bit_masks[reg];
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if (actual != expected) {
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msg_cdbg("%s: wp_verify failed: reg:%u actual:0x%x expected:0x%x\n",
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__func__, reg, actual, expected);
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ret = FLASHROM_WP_ERR_VERIFY_FAILED;
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}
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}
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return ret;
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}
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static decode_range_func_t *lookup_decode_range_func_ptr(const struct flashchip *chip)
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{
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switch (chip->decode_range) {
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case DECODE_RANGE_SPI25: return &decode_range_spi25;
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case DECODE_RANGE_SPI25_64K_BLOCK: return &decode_range_spi25_64k_block;
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case DECODE_RANGE_SPI25_BIT_CMP: return &decode_range_spi25_bit_cmp;
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case DECODE_RANGE_SPI25_2X_BLOCK: return &decode_range_spi25_2x_block;
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/* default: total function, 0 indicates no decode range function set. */
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case NO_DECODE_RANGE_FUNC: return NULL;
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};
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return NULL;
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}
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/** Get the range selected by a WP configuration. */
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static enum flashrom_wp_result get_wp_range(struct wp_range *range, struct flashctx *flash, const struct wp_bits *bits)
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{
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decode_range_func_t *decode_range = lookup_decode_range_func_ptr(flash->chip);
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if (decode_range == NULL)
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return FLASHROM_WP_ERR_OTHER;
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decode_range(&range->start, &range->len, bits, flashrom_flash_getsize(flash));
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return FLASHROM_WP_OK;
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}
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/** Write protect bit values and the range they will activate. */
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struct wp_range_and_bits {
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struct wp_bits bits;
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struct wp_range range;
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};
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/**
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* Comparator used for sorting ranges in get_ranges_and_wp_bits().
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*
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* Ranges are ordered by these attributes, in decreasing significance:
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* (range length, range start, cmp bit, sec bit, tb bit, bp bits)
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*/
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static int compare_ranges(const void *aa, const void *bb)
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{
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const struct wp_range_and_bits
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*a = (const struct wp_range_and_bits *)aa,
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*b = (const struct wp_range_and_bits *)bb;
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int ord = 0;
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if (ord == 0)
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ord = a->range.len - b->range.len;
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if (ord == 0)
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ord = a->range.start - b->range.start;
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if (ord == 0)
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ord = a->bits.cmp - b->bits.cmp;
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if (ord == 0)
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ord = a->bits.sec - b->bits.sec;
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if (ord == 0)
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ord = a->bits.tb - b->bits.tb;
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for (int i = a->bits.bp_bit_count - 1; i >= 0; i--) {
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if (ord == 0)
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ord = a->bits.bp[i] - b->bits.bp[i];
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}
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return ord;
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}
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static bool can_write_bit(const struct reg_bit_info bit)
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{
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/*
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* TODO: check if the programmer supports writing the register that the
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* bit is in. For example, some chipsets may only allow SR1 to be
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* written.
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*/
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return bit.reg != INVALID_REG && bit.writability == RW;
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}
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/**
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* Enumerate all protection ranges that the chip supports and that are able to
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* be activated, given limitations such as OTP bits or programmer-enforced
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* restrictions. Returns a list of deduplicated wp_range_and_bits structures.
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*
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* Allocates a buffer that must be freed by the caller with free().
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*/
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static enum flashrom_wp_result get_ranges_and_wp_bits(struct flashctx *flash, struct wp_bits bits, struct wp_range_and_bits **ranges, size_t *count)
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{
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const struct reg_bit_map *reg_bits = &flash->chip->reg_bits;
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/*
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* Create a list of bits that affect the chip's protection range in
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* range_bits. Each element is a pointer to a member of the wp_bits
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* structure that will be modified.
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*
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* Some chips have range bits that cannot be changed (e.g. MX25L6473E
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* has a one-time programmable TB bit). Rather than enumerating all
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* possible values for unwritable bits, just read their values from the
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* chip to ensure we only enumerate ranges that are actually available.
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*/
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uint8_t *range_bits[ARRAY_SIZE(bits.bp) + 1 /* TB */ + 1 /* SEC */ + 1 /* CMP */];
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size_t bit_count = 0;
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for (size_t i = 0; i < ARRAY_SIZE(bits.bp); i++) {
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if (can_write_bit(reg_bits->bp[i]))
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range_bits[bit_count++] = &bits.bp[i];
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}
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if (can_write_bit(reg_bits->tb))
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range_bits[bit_count++] = &bits.tb;
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if (can_write_bit(reg_bits->sec))
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range_bits[bit_count++] = &bits.sec;
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if (can_write_bit(reg_bits->cmp))
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range_bits[bit_count++] = &bits.cmp;
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/* Allocate output buffer */
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*count = 1 << bit_count;
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*ranges = calloc(*count, sizeof(struct wp_range_and_bits));
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/* TODO: take WPS bit into account. */
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for (size_t range_index = 0; range_index < *count; range_index++) {
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/*
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* Extract bits from the range index and assign them to members
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* of the wp_bits structure. The loop bounds ensure that all
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* bit combinations will be enumerated.
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*/
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for (size_t i = 0; i < bit_count; i++)
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*range_bits[i] = (range_index >> i) & 1;
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struct wp_range_and_bits *output = &(*ranges)[range_index];
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output->bits = bits;
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enum flashrom_wp_result ret = get_wp_range(&output->range, flash, &bits);
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if (ret != FLASHROM_WP_OK) {
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free(*ranges);
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return ret;
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}
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/* Debug: print range bits and range */
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msg_gspew("Enumerated range: ");
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if (bits.cmp_bit_present)
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msg_gspew("CMP=%u ", bits.cmp);
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if (bits.sec_bit_present)
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msg_gspew("SEC=%u ", bits.sec);
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if (bits.tb_bit_present)
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msg_gspew("TB=%u ", bits.tb);
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for (size_t i = 0; i < bits.bp_bit_count; i++) {
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size_t j = bits.bp_bit_count - i - 1;
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msg_gspew("BP%zu=%u ", j, bits.bp[j]);
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}
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msg_gspew(" start=0x%08zx length=0x%08zx\n",
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output->range.start, output->range.len);
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}
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/* Sort ranges. Ensures consistency if there are duplicate ranges. */
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qsort(*ranges, *count, sizeof(struct wp_range_and_bits), compare_ranges);
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/* Remove duplicates */
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size_t output_index = 0;
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struct wp_range *last_range = NULL;
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for (size_t i = 0; i < *count; i++) {
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bool different_to_last =
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(last_range == NULL) ||
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((*ranges)[i].range.start != last_range->start) ||
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((*ranges)[i].range.len != last_range->len);
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if (different_to_last) {
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/* Move range to the next free position */
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(*ranges)[output_index] = (*ranges)[i];
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output_index++;
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/* Keep track of last non-duplicate range */
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last_range = &(*ranges)[i].range;
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}
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}
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/* Reduce count to only include non-duplicate ranges */
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*count = output_index;
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return FLASHROM_WP_OK;
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}
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static bool ranges_equal(struct wp_range a, struct wp_range b)
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{
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return (a.start == b.start) && (a.len == b.len);
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}
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/*
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* Modify the range-related bits in a wp_bits structure so they select a given
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* protection range. Bits that control the protection mode are not changed.
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*/
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static int set_wp_range(struct wp_bits *bits, struct flashctx *flash, const struct wp_range range)
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{
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struct wp_range_and_bits *ranges = NULL;
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size_t count;
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enum flashrom_wp_result ret = get_ranges_and_wp_bits(flash, *bits, &ranges, &count);
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if (ret != FLASHROM_WP_OK)
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return ret;
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/* Search for matching range */
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ret = FLASHROM_WP_ERR_RANGE_UNSUPPORTED;
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for (size_t i = 0; i < count; i++) {
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if (ranges_equal(ranges[i].range, range)) {
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*bits = ranges[i].bits;
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ret = 0;
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break;
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}
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}
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free(ranges);
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return ret;
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}
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/** Get the mode selected by a WP configuration. */
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static int get_wp_mode(enum flashrom_wp_mode *mode, const struct wp_bits *bits)
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{
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const enum flashrom_wp_mode wp_modes[2][2] = {
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{
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FLASHROM_WP_MODE_DISABLED, /* srl=0, srp=0 */
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FLASHROM_WP_MODE_HARDWARE, /* srl=0, srp=1 */
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}, {
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FLASHROM_WP_MODE_POWER_CYCLE, /* srl=1, srp=0 */
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FLASHROM_WP_MODE_PERMANENT, /* srl=1, srp=1 */
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},
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};
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*mode = wp_modes[bits->srl][bits->srp];
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return FLASHROM_WP_OK;
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}
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/** Modify a wp_bits structure such that it will select a specified protection mode. */
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static int set_wp_mode(struct wp_bits *bits, const enum flashrom_wp_mode mode)
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{
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switch (mode) {
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case FLASHROM_WP_MODE_DISABLED:
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bits->srl = 0;
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bits->srp = 0;
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return FLASHROM_WP_OK;
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case FLASHROM_WP_MODE_HARDWARE:
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if (!bits->srp_bit_present)
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return FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
|
|
|
|
bits->srl = 0;
|
|
bits->srp = 1;
|
|
return FLASHROM_WP_OK;
|
|
|
|
case FLASHROM_WP_MODE_POWER_CYCLE:
|
|
case FLASHROM_WP_MODE_PERMANENT:
|
|
default:
|
|
/*
|
|
* Don't try to enable power cycle or permanent protection for
|
|
* now. Those modes may be possible to activate on some chips,
|
|
* but they are usually unavailable by default or require special
|
|
* commands to activate.
|
|
*/
|
|
return FLASHROM_WP_ERR_MODE_UNSUPPORTED;
|
|
}
|
|
}
|
|
|
|
static bool chip_supported(struct flashctx *flash)
|
|
{
|
|
return (flash->chip != NULL) && (flash->chip->decode_range != NO_DECODE_RANGE_FUNC);
|
|
}
|
|
|
|
|
|
bool wp_operations_available(struct flashrom_flashctx *flash)
|
|
{
|
|
return (flash->mst->buses_supported & BUS_SPI) ||
|
|
((flash->mst->buses_supported & BUS_PROG) &&
|
|
flash->mst->opaque.read_register &&
|
|
flash->mst->opaque.write_register);
|
|
}
|
|
|
|
enum flashrom_wp_result wp_read_cfg(struct flashrom_wp_cfg *cfg, struct flashctx *flash)
|
|
{
|
|
struct wp_bits bits;
|
|
enum flashrom_wp_result ret = FLASHROM_WP_OK;
|
|
|
|
if (!chip_supported(flash))
|
|
ret = FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
|
|
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = read_wp_bits(&bits, flash);
|
|
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = get_wp_range(&cfg->range, flash, &bits);
|
|
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = get_wp_mode(&cfg->mode, &bits);
|
|
|
|
return ret;
|
|
}
|
|
|
|
enum flashrom_wp_result wp_write_cfg(struct flashctx *flash, const struct flashrom_wp_cfg *cfg)
|
|
{
|
|
struct wp_bits bits;
|
|
enum flashrom_wp_result ret = FLASHROM_WP_OK;
|
|
|
|
if (!chip_supported(flash))
|
|
ret = FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
|
|
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = read_wp_bits(&bits, flash);
|
|
|
|
/* Set protection range */
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = set_wp_range(&bits, flash, cfg->range);
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = write_wp_bits(flash, bits);
|
|
|
|
/* Set protection mode */
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = set_wp_mode(&bits, cfg->mode);
|
|
if (ret == FLASHROM_WP_OK)
|
|
ret = write_wp_bits(flash, bits);
|
|
|
|
return ret;
|
|
}
|
|
|
|
enum flashrom_wp_result wp_get_available_ranges(struct flashrom_wp_ranges **list, struct flashrom_flashctx *flash)
|
|
{
|
|
struct wp_bits bits;
|
|
struct wp_range_and_bits *range_pairs = NULL;
|
|
size_t count;
|
|
|
|
if (!chip_supported(flash))
|
|
return FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
|
|
|
|
enum flashrom_wp_result ret = read_wp_bits(&bits, flash);
|
|
if (ret != FLASHROM_WP_OK)
|
|
return ret;
|
|
|
|
ret = get_ranges_and_wp_bits(flash, bits, &range_pairs, &count);
|
|
if (ret != FLASHROM_WP_OK)
|
|
return ret;
|
|
|
|
*list = calloc(1, sizeof(struct flashrom_wp_ranges));
|
|
struct wp_range *ranges = calloc(count, sizeof(struct wp_range));
|
|
|
|
if (!(*list) || !ranges) {
|
|
free(*list);
|
|
free(ranges);
|
|
ret = FLASHROM_WP_ERR_OTHER;
|
|
goto out;
|
|
}
|
|
(*list)->count = count;
|
|
(*list)->ranges = ranges;
|
|
|
|
for (size_t i = 0; i < count; i++)
|
|
ranges[i] = range_pairs[i].range;
|
|
|
|
out:
|
|
free(range_pairs);
|
|
return ret;
|
|
}
|