mirror of
https://review.coreboot.org/flashrom.git
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b0eee9b8d6
We do CPU architecture checks once for the makefile in arch.h and once for HW access abstraction in hwaccess.c. This patch unifies related files so that they can share the checks to improve maintainability and reduce the chance of inconsistencies. Furthermore, it refines some of the definitions, which - adds "support" for AARCH64 and PPC64, - adds big-endian handling on arm as well as LE handling on PPC64, - fixes compilation of internal.c on AARCH64 and PPC64. Additionally, this patch continues to unify all OS checks in flashrom by adding a new helper macro IS_WINDOWS. The old header file for architecture checking is renamed to platform.h to reflect its broader scope and all new macros are add in there. Corresponding to flashrom svn r1864. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
372 lines
9.7 KiB
C
372 lines
9.7 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2009 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Header file for hardware access and OS abstraction. Included from flash.h.
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*/
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#ifndef __HWACCESS_H__
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#define __HWACCESS_H__ 1
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#include "platform.h"
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#if IS_X86
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#if defined(__GLIBC__)
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#include <sys/io.h>
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#endif
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#endif
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#if NEED_PCI == 1
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/*
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* libpci headers use the variable name "index" which triggers shadowing
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* warnings on systems which have the index() function in a default #include
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* or as builtin.
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*/
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#define index shadow_workaround_index
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#if !defined (__NetBSD__) && !defined (__DragonFly__)
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#include <pci/pci.h>
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#else
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#include <pciutils/pci.h>
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#endif
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#undef index
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#endif /* NEED_PCI == 1 */
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/* The next big hunk tries to guess endianess from various preprocessor macros */
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/* First some error checking in case some weird header has defines both.
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* NB: OpenBSD always defines _BIG_ENDIAN and _LITTLE_ENDIAN. */
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#if defined (__LITTLE_ENDIAN__) && defined (__BIG_ENDIAN__)
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#error Conflicting endianness #define
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#endif
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#if IS_X86
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/* All x86 is little-endian. */
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#define __FLASHROM_LITTLE_ENDIAN__ 1
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#elif IS_MIPS
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/* MIPS can be either endian. */
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#if defined (__MIPSEL) || defined (__MIPSEL__) || defined (_MIPSEL) || defined (MIPSEL)
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#define __FLASHROM_LITTLE_ENDIAN__ 1
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#elif defined (__MIPSEB) || defined (__MIPSEB__) || defined (_MIPSEB) || defined (MIPSEB)
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#define __FLASHROM_BIG_ENDIAN__ 1
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#endif
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#elif IS_PPC
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/* PowerPC can be either endian. */
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#if defined (_BIG_ENDIAN) || defined (__BIG_ENDIAN__)
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#define __FLASHROM_BIG_ENDIAN__ 1
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#elif defined (_LITTLE_ENDIAN) || defined (__LITTLE_ENDIAN__)
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#define __FLASHROM_LITTLE_ENDIAN__ 1
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#endif
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#elif IS_ARM
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/* ARM can be either endian. */
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#if defined (__ARMEB__)
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#define __FLASHROM_BIG_ENDIAN__ 1
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#elif defined (__ARMEL__)
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#define __FLASHROM_LITTLE_ENDIAN__ 1
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#endif
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#endif /* IS_? */
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#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
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/* If architecture-specific approaches fail try generic variants. First: BSD (works about everywhere). */
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#if !IS_WINDOWS
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#include <sys/param.h>
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#if defined (__BYTE_ORDER)
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#define __FLASHROM_LITTLE_ENDIAN__
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#elif __BYTE_ORDER == __BIG_ENDIAN
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#define __FLASHROM_BIG_ENDIAN__
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#else
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#error Unknown byte order!
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#endif
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#endif /* defined __BYTE_ORDER */
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#endif /* !IS_WINDOWS */
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#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
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/* Nonstandard libc-specific macros for determining endianness. */
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#if defined(__GLIBC__)
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#include <endian.h>
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#if BYTE_ORDER == LITTLE_ENDIAN
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#define __FLASHROM_LITTLE_ENDIAN__ 1
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#elif BYTE_ORDER == BIG_ENDIAN
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#define __FLASHROM_BIG_ENDIAN__ 1
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#endif
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#endif
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#endif
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#endif
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#if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
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#error Unable to determine endianness.
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#endif
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#define ___constant_swab8(x) ((uint8_t) ( \
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(((uint8_t)(x) & (uint8_t)0xffU))))
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#define ___constant_swab16(x) ((uint16_t) ( \
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(((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
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(((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
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#define ___constant_swab32(x) ((uint32_t) ( \
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(((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
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(((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
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(((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
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(((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
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#define ___constant_swab64(x) ((uint64_t) ( \
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(((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \
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(((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
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(((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
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(((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \
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(((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \
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(((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
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(((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
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(((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56)))
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#if defined (__FLASHROM_BIG_ENDIAN__)
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#define cpu_to_le(bits) \
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static inline uint##bits##_t cpu_to_le##bits(uint##bits##_t val) \
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{ \
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return ___constant_swab##bits(val); \
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}
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cpu_to_le(8)
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cpu_to_le(16)
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cpu_to_le(32)
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cpu_to_le(64)
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#define cpu_to_be8
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#define cpu_to_be16
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#define cpu_to_be32
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#define cpu_to_be64
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#elif defined (__FLASHROM_LITTLE_ENDIAN__)
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#define cpu_to_be(bits) \
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static inline uint##bits##_t cpu_to_be##bits(uint##bits##_t val) \
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{ \
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return ___constant_swab##bits(val); \
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}
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cpu_to_be(8)
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cpu_to_be(16)
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cpu_to_be(32)
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cpu_to_be(64)
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#define cpu_to_le8
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#define cpu_to_le16
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#define cpu_to_le32
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#define cpu_to_le64
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#endif /* __FLASHROM_BIG_ENDIAN__ / __FLASHROM_LITTLE_ENDIAN__ */
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#define be_to_cpu8 cpu_to_be8
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#define be_to_cpu16 cpu_to_be16
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#define be_to_cpu32 cpu_to_be32
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#define be_to_cpu64 cpu_to_be64
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#define le_to_cpu8 cpu_to_le8
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#define le_to_cpu16 cpu_to_le16
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#define le_to_cpu32 cpu_to_le32
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#define le_to_cpu64 cpu_to_le64
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#if NEED_PCI == 1
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#if IS_X86
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#define __FLASHROM_HAVE_OUTB__ 1
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/* for iopl and outb under Solaris */
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#if defined (__sun)
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#include <sys/sysi86.h>
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#include <sys/psw.h>
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#include <asm/sunddi.h>
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#endif
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/* Clarification about OUTB/OUTW/OUTL argument order:
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* OUT[BWL](val, port)
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*/
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#if defined(__FreeBSD__) || defined(__DragonFly__)
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/* Note that Debian/kFreeBSD (FreeBSD kernel with glibc) has conflicting
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* out[bwl] definitions in machine/cpufunc.h and sys/io.h at least in some
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* versions. Use machine/cpufunc.h only for plain FreeBSD/DragonFlyBSD.
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*/
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#include <machine/cpufunc.h>
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#define OUTB(x, y) do { u_int outb_tmp = (y); outb(outb_tmp, (x)); } while (0)
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#define OUTW(x, y) do { u_int outw_tmp = (y); outw(outw_tmp, (x)); } while (0)
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#define OUTL(x, y) do { u_int outl_tmp = (y); outl(outl_tmp, (x)); } while (0)
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#define INB(x) __extension__ ({ u_int inb_tmp = (x); inb(inb_tmp); })
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#define INW(x) __extension__ ({ u_int inw_tmp = (x); inw(inw_tmp); })
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#define INL(x) __extension__ ({ u_int inl_tmp = (x); inl(inl_tmp); })
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#else
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#if defined(__MACH__) && defined(__APPLE__)
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/* Header is part of the DirectHW library. */
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#include <DirectHW/DirectHW.h>
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#else
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#if defined (__sun)
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/* Note different order for outb */
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#define OUTB(x,y) outb(y, x)
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#define OUTW(x,y) outw(y, x)
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#define OUTL(x,y) outl(y, x)
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#define INB inb
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#define INW inw
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#define INL inl
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#else
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#ifdef __DJGPP__
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#include <pc.h>
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#define OUTB(x,y) outportb(y, x)
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#define OUTW(x,y) outportw(y, x)
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#define OUTL(x,y) outportl(y, x)
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#define INB inportb
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#define INW inportw
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#define INL inportl
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#else
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/* This is the usual glibc interface. */
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#define OUTB outb
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#define OUTW outw
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#define OUTL outl
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#define INB inb
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#define INW inw
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#define INL inl
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#endif
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#endif
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#endif
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#endif
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#if defined(__NetBSD__) || defined (__OpenBSD__)
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#if defined(__i386__) || defined(__x86_64__)
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#include <sys/types.h>
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#include <machine/sysarch.h>
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#if defined(__NetBSD__)
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#if defined(__i386__)
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#define iopl i386_iopl
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#elif defined(__x86_64__)
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#define iopl x86_64_iopl
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#endif
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#elif defined (__OpenBSD__)
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#if defined(__i386__)
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#define iopl i386_iopl
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#elif defined(__amd64__)
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#define iopl amd64_iopl
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#endif
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#endif
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static inline void outb(uint8_t value, uint16_t port)
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{
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__asm__ volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint8_t inb(uint16_t port)
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{
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uint8_t value;
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__asm__ volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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static inline void outw(uint16_t value, uint16_t port)
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{
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__asm__ volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint16_t inw(uint16_t port)
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{
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uint16_t value;
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__asm__ volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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static inline void outl(uint32_t value, uint16_t port)
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{
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__asm__ volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
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}
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static inline uint32_t inl(uint16_t port)
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{
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uint32_t value;
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__asm__ volatile ("inl %1,%0":"=a" (value):"Nd" (port));
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return value;
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}
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#endif
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#endif
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#if !(defined(__MACH__) && defined(__APPLE__)) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
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typedef struct { uint32_t hi, lo; } msr_t;
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msr_t rdmsr(int addr);
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int wrmsr(int addr, msr_t msr);
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#endif
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#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
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/* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
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#undef rdmsr
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#undef wrmsr
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#define rdmsr freebsd_rdmsr
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#define wrmsr freebsd_wrmsr
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typedef struct { uint32_t hi, lo; } msr_t;
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msr_t freebsd_rdmsr(int addr);
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int freebsd_wrmsr(int addr, msr_t msr);
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#endif
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#if defined(__LIBPAYLOAD__)
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#include <arch/io.h>
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#include <arch/msr.h>
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typedef struct { uint32_t hi, lo; } msr_t;
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msr_t libpayload_rdmsr(int addr);
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int libpayload_wrmsr(int addr, msr_t msr);
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#undef rdmsr
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#define rdmsr libpayload_rdmsr
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#define wrmsr libpayload_wrmsr
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#endif
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#elif IS_PPC
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/* PCI port I/O is not yet implemented on PowerPC. */
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#elif IS_MIPS
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/* PCI port I/O is not yet implemented on MIPS. */
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#elif IS_ARM
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/* Non memory mapped I/O is not supported on ARM. */
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#else
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#error Unknown architecture, please check if it supports PCI port IO.
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#endif /* IS_* */
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#endif /* NEED_PCI == 1 */
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#endif /* !__HWACCESS_H__ */
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