mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 22:52:34 +02:00

All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
96 lines
2.5 KiB
C
96 lines
2.5 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2009 Kontron Modular Computers
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* Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Adapted from the Intel FW hub stuff for 82802ax parts. */
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#include "flash.h"
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static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset)
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{
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chipaddr registers = flash->virtual_registers;
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uint8_t blockstatus;
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blockstatus = chip_readb(flash, registers + offset + 2);
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msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ",
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offset, flash->page_size, blockstatus);
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switch (blockstatus & 0x3) {
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case 0x0:
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msg_cdbg("full access\n");
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break;
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case 0x1:
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msg_cdbg("write locked\n");
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break;
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case 0x2:
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msg_cdbg("locked open\n");
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break;
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case 0x3:
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msg_cdbg("write locked down\n");
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break;
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}
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/* Return content of the write_locked bit */
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return blockstatus & 0x1;
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}
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static int clear_sst_fwhub_block_lock(struct flashctx *flash, int offset)
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{
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chipaddr registers = flash->virtual_registers;
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uint8_t blockstatus;
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blockstatus = check_sst_fwhub_block_lock(flash, offset);
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if (blockstatus) {
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msg_cdbg("Trying to clear lock for 0x%06x... ", offset);
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chip_writeb(flash, 0, registers + offset + 2);
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blockstatus = check_sst_fwhub_block_lock(flash, offset);
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msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK");
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}
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return blockstatus;
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}
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int printlock_sst_fwhub(struct flashctx *flash)
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{
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int i;
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for (i = 0; i < flash->total_size * 1024; i += flash->page_size)
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check_sst_fwhub_block_lock(flash, i);
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return 0;
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}
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int unlock_sst_fwhub(struct flashctx *flash)
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{
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int i, ret=0;
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for (i = 0; i < flash->total_size * 1024; i += flash->page_size)
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{
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if (clear_sst_fwhub_block_lock(flash, i))
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{
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msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i);
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ret++;
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}
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}
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return ret;
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}
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