mirror of
https://review.coreboot.org/flashrom.git
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- Fix a number of typos (found via ispell). - Use correct vendor names (as per their websites) consistently. Corresponding to flashrom svn r985. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
151 lines
4.6 KiB
C
151 lines
4.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2002 Linux Networx
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* (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
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* Copyright (C) 2005-2007 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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#ifndef COREBOOT_TABLES_H
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#define COREBOOT_TABLES_H
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#include <stdint.h>
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/* The coreboot table information is for conveying information
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* from the firmware to the loaded OS image. Primarily this
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* is expected to be information that cannot be discovered by
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* other means, such as querying the hardware directly.
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*
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* All of the information should be Position Independent Data.
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* That is it should be safe to relocated any of the information
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* without it's meaning/correctness changing. For table that
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* can reasonably be used on multiple architectures the data
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* size should be fixed. This should ease the transition between
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* 32 bit and 64 bit architectures etc.
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*
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* The completeness test for the information in this table is:
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* - Can all of the hardware be detected?
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* - Are the per motherboard constants available?
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* - Is there enough to allow a kernel to run that was written before
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* a particular motherboard is constructed? (Assuming the kernel
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* has drivers for all of the hardware but it does not have
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* assumptions on how the hardware is connected together).
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*
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* With this test it should be straight forward to determine if a
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* table entry is required or not. This should remove much of the
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* long term compatibility burden as table entries which are
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* irrelevant or have been replaced by better alternatives may be
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* dropped. Of course it is polite and expedite to include extra
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* table entries and be backwards compatible, but it is not required.
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*/
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/* Since coreboot is usually compiled 32bit, gcc will align 64bit
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* types to 32bit boundaries. If the coreboot table is dumped on a
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* 64bit system, a uint64_t would be aligned to 64bit boundaries,
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* breaking the table format.
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*
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* lb_uint64 will keep 64bit coreboot table values aligned to 32bit
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* to ensure compatibility. They can be accessed with the two functions
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* below: unpack_lb64() and pack_lb64()
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*
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* See also: util/lbtdump/lbtdump.c
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*/
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struct lb_uint64 {
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uint32_t lo;
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uint32_t hi;
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};
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struct lb_header {
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uint8_t signature[4]; /* LBIO */
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uint32_t header_bytes;
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uint32_t header_checksum;
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uint32_t table_bytes;
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uint32_t table_checksum;
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uint32_t table_entries;
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};
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/* Every entry in the boot environment list will correspond to a boot
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* info record. Encoding both type and size. The type is obviously
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* so you can tell what it is. The size allows you to skip that
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* boot environment record if you don't know what it easy. This allows
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* forward compatibility with records not yet defined.
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*/
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struct lb_record {
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uint32_t tag; /* tag ID */
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uint32_t size; /* size of record (in bytes) */
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};
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#define LB_TAG_UNUSED 0x0000
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#define LB_TAG_MEMORY 0x0001
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struct lb_memory_range {
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struct lb_uint64 start;
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struct lb_uint64 size;
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uint32_t type;
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#define LB_MEM_RAM 1 /* Memory anyone can use */
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#define LB_MEM_RESERVED 2 /* Don't use this memory region */
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#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
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};
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struct lb_memory {
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uint32_t tag;
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uint32_t size;
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struct lb_memory_range map[0];
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};
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#define LB_TAG_HWRPB 0x0002
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struct lb_hwrpb {
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uint32_t tag;
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uint32_t size;
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uint64_t hwrpb;
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};
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#define LB_TAG_MAINBOARD 0x0003
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struct lb_mainboard {
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uint32_t tag;
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uint32_t size;
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uint8_t vendor_idx;
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uint8_t part_number_idx;
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uint8_t strings[0];
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};
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#define LB_TAG_VERSION 0x0004
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#define LB_TAG_EXTRA_VERSION 0x0005
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#define LB_TAG_BUILD 0x0006
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#define LB_TAG_COMPILE_TIME 0x0007
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#define LB_TAG_COMPILE_BY 0x0008
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#define LB_TAG_COMPILE_HOST 0x0009
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#define LB_TAG_COMPILE_DOMAIN 0x000a
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#define LB_TAG_COMPILER 0x000b
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#define LB_TAG_LINKER 0x000c
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#define LB_TAG_ASSEMBLER 0x000d
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struct lb_string {
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uint32_t tag;
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uint32_t size;
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uint8_t string[0];
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};
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#define LB_TAG_FORWARD 0x0011
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struct lb_forward {
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uint32_t tag;
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uint32_t size;
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uint64_t forward;
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};
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#endif /* COREBOOT_TABLES_H */
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