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flashrom/sst28sf040.c
Anastasia Klimchuk c09a2f5387 core: Use SPDX in headers
Change-Id: Ic24a54ab520053e49efcba02bd9fa5b8ce69b20a
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/89956
Reviewed-by: Antonio Vázquez Blanco <antoniovazquezblanco@gmail.com>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2025-11-12 11:30:28 +00:00

117 lines
2.8 KiB
C

/*
* This file is part of the flashrom project.
*
* SPDX-License-Identifier: GPL-2.0-or-later
* SPDX-FileCopyrightText: 2000 Silicon Integrated System Corporation
* SPDX-FileCopyrightText: 2005 coresystems GmbH <stepan@openbios.org>
* SPDX-FileCopyrightText: 2009 Sean Nelson <audiohacked@gmail.com>
*/
#include "flash.h"
#include "parallel.h"
#include "chipdrivers.h"
#define AUTO_PG_ERASE1 0x20
#define AUTO_PG_ERASE2 0xD0
#define AUTO_PGRM 0x10
#define CHIP_ERASE 0x30
#define RESET 0xFF
#define READ_ID 0x90
int protect_28sf040(struct flashctx *flash)
{
chipaddr bios = flash->virtual_memory;
chip_readb(flash, bios + 0x1823);
chip_readb(flash, bios + 0x1820);
chip_readb(flash, bios + 0x1822);
chip_readb(flash, bios + 0x0418);
chip_readb(flash, bios + 0x041B);
chip_readb(flash, bios + 0x0419);
chip_readb(flash, bios + 0x040A);
return 0;
}
int unprotect_28sf040(struct flashctx *flash)
{
chipaddr bios = flash->virtual_memory;
chip_readb(flash, bios + 0x1823);
chip_readb(flash, bios + 0x1820);
chip_readb(flash, bios + 0x1822);
chip_readb(flash, bios + 0x0418);
chip_readb(flash, bios + 0x041B);
chip_readb(flash, bios + 0x0419);
chip_readb(flash, bios + 0x041A);
return 0;
}
int erase_sector_28sf040(struct flashctx *flash, unsigned int address,
unsigned int sector_size)
{
chipaddr bios = flash->virtual_memory;
/* This command sequence is very similar to erase_block_82802ab. */
chip_writeb(flash, AUTO_PG_ERASE1, bios);
chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
/* wait for Toggle bit ready */
toggle_ready_jedec(flash, bios);
/* FIXME: Check the status register for errors. */
return 0;
}
/* chunksize is 1 */
int write_28sf040(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len)
{
unsigned int i;
chipaddr bios = flash->virtual_memory;
chipaddr dst = flash->virtual_memory + start;
for (i = 0; i < len; i++) {
/* transfer data from source to destination */
if (*src == 0xFF) {
dst++, src++;
/* If the data is 0xFF, don't program it */
continue;
}
/*issue AUTO PROGRAM command */
chip_writeb(flash, AUTO_PGRM, dst);
chip_writeb(flash, *src++, dst++);
/* wait for Toggle bit ready */
toggle_ready_jedec(flash, bios);
update_progress(flash, FLASHROM_PROGRESS_WRITE, 1);
}
return 0;
}
static int erase_28sf040(struct flashctx *flash)
{
chipaddr bios = flash->virtual_memory;
chip_writeb(flash, CHIP_ERASE, bios);
chip_writeb(flash, CHIP_ERASE, bios);
programmer_delay(flash, 10);
toggle_ready_jedec(flash, bios);
/* FIXME: Check the status register for errors. */
return 0;
}
int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
unsigned int blocklen)
{
if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
msg_cerr("%s called with incorrect arguments\n",
__func__);
return -1;
}
return erase_28sf040(flash);
}