mirror of
https://review.coreboot.org/flashrom.git
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75dc0655b9
Original progress reporting implemented in CB:49643 and it has some
issues, for example:
size_t start_address = start;
size_t end_address = len - start;
End address is anything but length minus start address.
update_progress(flash,
FLASHROM_PROGRESS_READ,
/*current*/ start - start_address + to_read,
/*total*/ end_address);
Total should just be length if that's how current value is computed.
---
libflashrom needs to know total size ahead of time.
That's init_progress() and changed update_progress().
It also needs to store the last current value to be able to update it.
That's stage_progress in flashrom_flashctx.
Measuring accurately amount of data which will be read/erased/written
isn't easy because things can be skipped as optimizations. The next
patch in the chain aims to address this, there are TODO/FIXME
comments there.
---
CLI shares terminal with the rest of the code and has to maintain more
state to handle that reasonably well.
Similar to CB:64668, an effort is made to keep the progress on a
single line. Non-progress output is kept track of to know when
moving to a new line cannot be avoided.
---
A script to test the CLI:
\#!/bin/bash
t=${1:-rewW}
shift
if [[ $t =~ r ]]; then
echo ">>> READ"
./flashrom -p dummy:emulate=W25Q128FV,freq=64mhz -r dump.rom --progress "$@"
echo
fi
if [[ $t =~ e ]]; then
echo ">>> ERASE"
./flashrom -p dummy:emulate=W25Q128FV,freq=64mhz -E --progress "$@"
echo
fi
if [[ $t =~ w ]]; then
echo ">>> WRITE (without erase)"
dd if=/dev/zero of=zero.rom bs=1M count=16 2> /dev/null
./flashrom -p dummy:emulate=W25Q128FV,freq=64mhz -w zero.rom --progress "$@"
echo
fi
if [[ $t =~ W ]]; then
echo ">>> WRITE (with erase)"
dd if=/dev/zero of=zero.rom bs=1M count=16 2> /dev/null
dd if=/dev/random of=random.rom bs=1M count=16 2> /dev/null
./flashrom -p dummy:emulate=W25Q128FV,freq=64mhz,image=random.rom -w zero.rom --progress "$@"
echo
fi
Co-developed-by: Anastasia Klimchuk <aklm@flashrom.org>
Co-developed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Change-Id: If1e40fc97f443c4f0c0501cef11cff1f3f84c051
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/84102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
125 lines
3.2 KiB
C
125 lines
3.2 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
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* Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "flash.h"
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#include "chipdrivers.h"
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#define AUTO_PG_ERASE1 0x20
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#define AUTO_PG_ERASE2 0xD0
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#define AUTO_PGRM 0x10
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#define CHIP_ERASE 0x30
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#define RESET 0xFF
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#define READ_ID 0x90
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int protect_28sf040(struct flashctx *flash)
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{
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chipaddr bios = flash->virtual_memory;
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chip_readb(flash, bios + 0x1823);
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chip_readb(flash, bios + 0x1820);
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chip_readb(flash, bios + 0x1822);
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chip_readb(flash, bios + 0x0418);
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chip_readb(flash, bios + 0x041B);
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chip_readb(flash, bios + 0x0419);
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chip_readb(flash, bios + 0x040A);
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return 0;
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}
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int unprotect_28sf040(struct flashctx *flash)
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{
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chipaddr bios = flash->virtual_memory;
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chip_readb(flash, bios + 0x1823);
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chip_readb(flash, bios + 0x1820);
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chip_readb(flash, bios + 0x1822);
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chip_readb(flash, bios + 0x0418);
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chip_readb(flash, bios + 0x041B);
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chip_readb(flash, bios + 0x0419);
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chip_readb(flash, bios + 0x041A);
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return 0;
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}
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int erase_sector_28sf040(struct flashctx *flash, unsigned int address,
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unsigned int sector_size)
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{
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chipaddr bios = flash->virtual_memory;
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/* This command sequence is very similar to erase_block_82802ab. */
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chip_writeb(flash, AUTO_PG_ERASE1, bios);
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chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
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/* wait for Toggle bit ready */
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toggle_ready_jedec(flash, bios);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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/* chunksize is 1 */
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int write_28sf040(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len)
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{
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unsigned int i;
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chipaddr bios = flash->virtual_memory;
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chipaddr dst = flash->virtual_memory + start;
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for (i = 0; i < len; i++) {
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/* transfer data from source to destination */
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if (*src == 0xFF) {
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dst++, src++;
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/* If the data is 0xFF, don't program it */
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continue;
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}
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/*issue AUTO PROGRAM command */
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chip_writeb(flash, AUTO_PGRM, dst);
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chip_writeb(flash, *src++, dst++);
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/* wait for Toggle bit ready */
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toggle_ready_jedec(flash, bios);
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update_progress(flash, FLASHROM_PROGRESS_WRITE, 1);
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}
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return 0;
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}
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static int erase_28sf040(struct flashctx *flash)
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{
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chipaddr bios = flash->virtual_memory;
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chip_writeb(flash, CHIP_ERASE, bios);
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chip_writeb(flash, CHIP_ERASE, bios);
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programmer_delay(flash, 10);
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toggle_ready_jedec(flash, bios);
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/* FIXME: Check the status register for errors. */
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return 0;
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}
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int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
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unsigned int blocklen)
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{
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if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
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msg_cerr("%s called with incorrect arguments\n",
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__func__);
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return -1;
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}
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return erase_28sf040(flash);
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}
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