mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-27 07:02:34 +02:00

All functions which just call probe_jedec and then map flash registers are replaced by probe_jedec. All functions which call probe_jedec, map flash registers and do something else can at least eliminate mapping flash registers. Fix logic inversion in probe_jedec to map flash registers on success instead of on failure. Change a few TIMING_IGNORED to TIMING_FIXME where probe_jedec is used. Total savings: One probe function simplified, three probe functions eliminated. Corresponding to flashrom svn r839. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked@gmail.com>
458 lines
12 KiB
C
458 lines
12 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2000 Silicon Integrated System Corporation
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* Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
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* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
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* Copyright (C) 2007 Carl-Daniel Hailfinger
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* Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "flash.h"
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#define MAX_REFLASH_TRIES 0x10
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#define MASK_FULL 0xffff
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#define MASK_2AA 0x7ff
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/* Check one byte for odd parity */
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uint8_t oddparity(uint8_t val)
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{
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val = (val ^ (val >> 4)) & 0xf;
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val = (val ^ (val >> 2)) & 0x3;
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return (val ^ (val >> 1)) & 0x1;
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}
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void toggle_ready_jedec_common(chipaddr dst, int delay)
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{
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unsigned int i = 0;
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uint8_t tmp1, tmp2;
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tmp1 = chip_readb(dst) & 0x40;
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while (i++ < 0xFFFFFFF) {
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if (delay)
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programmer_delay(delay);
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tmp2 = chip_readb(dst) & 0x40;
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if (tmp1 == tmp2) {
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break;
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}
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tmp1 = tmp2;
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}
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if (i > 0x100000)
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printf_debug("%s: excessive loops, i=0x%x\n", __func__, i);
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}
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void toggle_ready_jedec(chipaddr dst)
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{
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toggle_ready_jedec_common(dst, 0);
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}
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/* Some chips require a minimum delay between toggle bit reads.
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* The Winbond W39V040C wants 50 ms between reads on sector erase toggle,
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* but experiments show that 2 ms are already enough. Pick a safety factor
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* of 4 and use an 8 ms delay.
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* Given that erase is slow on all chips, it is recommended to use
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* toggle_ready_jedec_slow in erase functions.
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*/
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void toggle_ready_jedec_slow(chipaddr dst)
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{
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toggle_ready_jedec_common(dst, 8 * 1000);
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}
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void data_polling_jedec(chipaddr dst, uint8_t data)
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{
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unsigned int i = 0;
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uint8_t tmp;
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data &= 0x80;
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while (i++ < 0xFFFFFFF) {
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tmp = chip_readb(dst) & 0x80;
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if (tmp == data) {
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break;
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}
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}
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if (i > 0x100000)
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printf_debug("%s: excessive loops, i=0x%x\n", __func__, i);
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}
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void start_program_jedec_common(struct flashchip *flash, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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chip_writeb(0xAA, bios + (0x5555 & mask));
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chip_writeb(0x55, bios + (0x2AAA & mask));
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chip_writeb(0xA0, bios + (0x5555 & mask));
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}
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int probe_jedec_common(struct flashchip *flash,
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unsigned int mask, int long_reset)
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{
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chipaddr bios = flash->virtual_memory;
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uint8_t id1, id2;
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uint32_t largeid1, largeid2;
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uint32_t flashcontent1, flashcontent2;
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int probe_timing_enter, probe_timing_exit;
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if (flash->probe_timing > 0)
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probe_timing_enter = probe_timing_exit = flash->probe_timing;
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else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
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probe_timing_enter = probe_timing_exit = 0;
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} else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
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printf_debug("Chip lacks correct probe timing information, "
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"using default 10mS/40uS. ");
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probe_timing_enter = 10000;
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probe_timing_exit = 40;
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} else {
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printf("Chip has negative value in probe_timing, failing "
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"without chip access\n");
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return 0;
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}
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/* Issue JEDEC Product ID Entry command */
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chip_writeb(0xAA, bios + (0x5555 & mask));
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if (probe_timing_enter)
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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if (probe_timing_enter)
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programmer_delay(10);
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chip_writeb(0x90, bios + (0x5555 & mask));
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if (probe_timing_enter)
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programmer_delay(probe_timing_enter);
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/* Read product ID */
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id1 = chip_readb(bios);
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id2 = chip_readb(bios + 0x01);
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largeid1 = id1;
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largeid2 = id2;
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/* Check if it is a continuation ID, this should be a while loop. */
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if (id1 == 0x7F) {
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largeid1 <<= 8;
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id1 = chip_readb(bios + 0x100);
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largeid1 |= id1;
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}
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if (id2 == 0x7F) {
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largeid2 <<= 8;
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id2 = chip_readb(bios + 0x101);
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largeid2 |= id2;
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}
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/* Issue JEDEC Product ID Exit command */
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if (long_reset)
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{
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chip_writeb(0xAA, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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if (probe_timing_exit)
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programmer_delay(10);
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}
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chip_writeb(0xF0, bios + (0x5555 & mask));
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if (probe_timing_exit)
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programmer_delay(probe_timing_exit);
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printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
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if (!oddparity(id1))
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printf_debug(", id1 parity violation");
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/* Read the product ID location again. We should now see normal flash contents. */
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flashcontent1 = chip_readb(bios);
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flashcontent2 = chip_readb(bios + 0x01);
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/* Check if it is a continuation ID, this should be a while loop. */
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if (flashcontent1 == 0x7F) {
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flashcontent1 <<= 8;
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flashcontent1 |= chip_readb(bios + 0x100);
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}
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if (flashcontent2 == 0x7F) {
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flashcontent2 <<= 8;
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flashcontent2 |= chip_readb(bios + 0x101);
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}
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if (largeid1 == flashcontent1)
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printf_debug(", id1 is normal flash content");
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if (largeid2 == flashcontent2)
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printf_debug(", id2 is normal flash content");
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printf_debug("\n");
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if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id)
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return 0;
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if (flash->feature_bits & FEATURE_REGISTERMAP)
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map_flash_registers(flash);
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return 1;
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}
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int erase_sector_jedec_common(struct flashchip *flash, unsigned int page,
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unsigned int pagesize, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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/* Issue the Sector Erase command */
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x80, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x30, bios + page);
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programmer_delay(10);
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/* wait for Toggle bit ready */
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toggle_ready_jedec_slow(bios);
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if (check_erased_range(flash, page, pagesize)) {
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fprintf(stderr,"ERASE FAILED!\n");
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return -1;
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}
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return 0;
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}
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int erase_block_jedec_common(struct flashchip *flash, unsigned int block,
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unsigned int blocksize, unsigned int mask)
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{
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chipaddr bios = flash->virtual_memory;
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/* Issue the Sector Erase command */
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x80, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x50, bios + block);
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programmer_delay(10);
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/* wait for Toggle bit ready */
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toggle_ready_jedec_slow(bios);
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if (check_erased_range(flash, block, blocksize)) {
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fprintf(stderr,"ERASE FAILED!\n");
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return -1;
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}
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return 0;
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}
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int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask)
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{
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int total_size = flash->total_size * 1024;
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chipaddr bios = flash->virtual_memory;
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/* Issue the JEDEC Chip Erase command */
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x80, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0xAA, bios + (0x5555 & mask));
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programmer_delay(10);
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chip_writeb(0x55, bios + (0x2AAA & mask));
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programmer_delay(10);
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chip_writeb(0x10, bios + (0x5555 & mask));
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programmer_delay(10);
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toggle_ready_jedec_slow(bios);
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if (check_erased_range(flash, 0, total_size)) {
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fprintf(stderr,"ERASE FAILED!\n");
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return -1;
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}
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return 0;
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}
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int write_byte_program_jedec_common(struct flashchip *flash, uint8_t *src,
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chipaddr dst, unsigned int mask)
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{
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int tried = 0, failed = 0;
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chipaddr bios = flash->virtual_memory;
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/* If the data is 0xFF, don't program it and don't complain. */
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if (*src == 0xFF) {
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return 0;
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}
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retry:
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/* Issue JEDEC Byte Program command */
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start_program_jedec_common(flash, mask);
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/* transfer data from source to destination */
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chip_writeb(*src, dst);
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toggle_ready_jedec(bios);
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if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
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goto retry;
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}
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if (tried >= MAX_REFLASH_TRIES)
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failed = 1;
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return failed;
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}
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int write_sector_jedec_common(struct flashchip *flash, uint8_t *src,
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chipaddr dst, unsigned int page_size, unsigned int mask)
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{
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int i, failed = 0;
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chipaddr olddst;
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olddst = dst;
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for (i = 0; i < page_size; i++) {
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if (write_byte_program_jedec_common(flash, src, dst, mask))
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failed = 1;
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dst++, src++;
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}
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if (failed)
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fprintf(stderr, " writing sector at 0x%lx failed!\n", olddst);
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return failed;
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}
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int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src,
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int start, int page_size, unsigned int mask)
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{
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int i, tried = 0, failed;
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uint8_t *s = src;
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chipaddr bios = flash->virtual_memory;
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chipaddr dst = bios + start;
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chipaddr d = dst;
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retry:
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/* Issue JEDEC Start Program comand */
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start_program_jedec_common(flash, mask);
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/* transfer data from source to destination */
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for (i = 0; i < page_size; i++) {
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/* If the data is 0xFF, don't program it */
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if (*src != 0xFF)
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chip_writeb(*src, dst);
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dst++;
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src++;
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}
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toggle_ready_jedec(dst - 1);
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dst = d;
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src = s;
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failed = verify_range(flash, src, start, page_size, NULL);
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if (failed && tried++ < MAX_REFLASH_TRIES) {
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fprintf(stderr, "retrying.\n");
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goto retry;
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}
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if (failed) {
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fprintf(stderr, " page 0x%lx failed!\n",
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(d - bios) / page_size);
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}
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return failed;
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}
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int write_jedec(struct flashchip *flash, uint8_t *buf)
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{
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int i, failed = 0;
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int total_size = flash->total_size * 1024;
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int page_size = flash->page_size;
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if (erase_chip_jedec(flash)) {
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fprintf(stderr,"ERASE FAILED!\n");
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return -1;
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}
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printf("Programming page: ");
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for (i = 0; i < total_size / page_size; i++) {
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printf("%04d at address: 0x%08x", i, i * page_size);
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if (write_page_write_jedec_common(flash, buf + i * page_size,
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i * page_size, page_size, MASK_FULL))
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failed = 1;
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printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
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}
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printf("\n");
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return failed;
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}
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int write_jedec_1(struct flashchip *flash, uint8_t * buf)
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{
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int i;
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chipaddr bios = flash->virtual_memory;
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chipaddr dst = bios;
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programmer_delay(10);
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if (erase_flash(flash)) {
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fprintf(stderr, "ERASE FAILED!\n");
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return -1;
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}
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printf("Programming page: ");
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for (i = 0; i < flash->total_size; i++) {
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if ((i & 0x3) == 0)
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printf("address: 0x%08lx", (unsigned long)i * 1024);
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write_sector_jedec_common(flash, buf + i * 1024, dst + i * 1024, 1024, MASK_FULL);
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if ((i & 0x3) == 0)
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printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
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}
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printf("\n");
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return 0;
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}
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/* erase chip with block_erase() prototype */
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int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr,
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unsigned int blocksize)
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{
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if ((addr != 0) || (blocksize != flash->total_size * 1024)) {
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fprintf(stderr, "%s called with incorrect arguments\n",
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__func__);
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return -1;
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}
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return erase_chip_jedec_common(flash, MASK_FULL);
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}
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int probe_jedec(struct flashchip *flash)
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{
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return probe_jedec_common(flash, MASK_FULL, 1);
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}
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int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
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{
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return erase_sector_jedec_common(flash, page, size, MASK_FULL);
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}
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int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
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{
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return erase_block_jedec_common(flash, page, size, MASK_FULL);
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}
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int erase_chip_jedec(struct flashchip *flash)
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{
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return erase_chip_jedec_common(flash, MASK_FULL);
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}
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