mirror of
https://review.coreboot.org/flashrom.git
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5609f9d408
Corresponding to flashrom svn r1602. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2010 Carl-Daniel Hailfinger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "flash.h"
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#include "chipdrivers.h"
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#include "spi.h"
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/* Prettyprint the status register. Works for AMIC A25L series. */
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int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
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{
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uint8_t status;
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status = spi_read_status_register(flash);
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msg_cdbg("Chip status register is %02x\n", status);
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spi_prettyprint_status_register_srwd(status);
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spi_prettyprint_status_register_bit(status, 6);
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spi_prettyprint_status_register_bit(status, 5);
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spi_prettyprint_status_register_bit(status, 4);
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spi_prettyprint_status_register_bp(status, 1);
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spi_prettyprint_status_register_welwip(status);
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return 0;
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}
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int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash)
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{
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uint8_t status;
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status = spi_read_status_register(flash);
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msg_cdbg("Chip status register is %02x\n", status);
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spi_prettyprint_status_register_srwd(status);
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spi_prettyprint_status_register_bit(status, 6);
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spi_prettyprint_status_register_bit(status, 5);
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spi_prettyprint_status_register_bp(status, 2);
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spi_prettyprint_status_register_welwip(status);
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return 0;
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}
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int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
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{
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uint8_t status;
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status = spi_read_status_register(flash);
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msg_cdbg("Chip status register is %02x\n", status);
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spi_prettyprint_status_register_srwd(status);
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msg_cdbg("Chip status register: Sector Protect Size (SEC) "
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"is %i KB\n", (status & (1 << 6)) ? 4 : 64);
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msg_cdbg("Chip status register: Top/Bottom (TB) "
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"is %s\n", (status & (1 << 5)) ? "bottom" : "top");
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spi_prettyprint_status_register_bp(status, 2);
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spi_prettyprint_status_register_welwip(status);
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msg_cdbg("Chip status register 2 is NOT decoded!\n");
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return 0;
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}
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int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash)
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{
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uint8_t status;
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status = spi_read_status_register(flash);
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msg_cdbg("Chip status register is %02x\n", status);
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spi_prettyprint_status_register_srwd(status);
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msg_cdbg("Chip status register: Sector Protect Size (SEC) "
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"is %i KB\n", (status & (1 << 6)) ? 4 : 64);
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msg_cdbg("Chip status register: Top/Bottom (TB) "
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"is %s\n", (status & (1 << 5)) ? "bottom" : "top");
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spi_prettyprint_status_register_bp(status, 2);
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spi_prettyprint_status_register_welwip(status);
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msg_cdbg("Chip status register 2 is NOT decoded!\n");
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return 0;
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}
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/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
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* spi_prettyprint_status_register_amic_a25l05p or
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* spi_prettyprint_status_register_amic_a25l40p.
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* FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
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* spi_prettyprint_status_register_amic_a25l032 or
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* spi_prettyprint_status_register_amic_a25lq032 if those have locks controlled
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* by the second status register.
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*/
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