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f43c654ad0
Allow 4-byte addresses for instructions usually used with 3-byte addresses. Decide in which way the 4th byte will be communicated based on the state of the chip (i.e. have we enabled 4BA mode) and a new feature bit for an extended address register. If we are not in 4BA mode and no extended address register is available or the write to it fails, bail out. We cache the state of 4BA mode and the extended address register in the flashctx. Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22384 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
120 lines
5.3 KiB
C
120 lines
5.3 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2014 Boris Baykov
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* JEDEC flash chips instructions for 4-bytes addressing
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* SPI chip driver functions for 4-bytes addressing
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*/
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#ifndef __SPI_4BA_H__
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#define __SPI_4BA_H__ 1
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/* Enter 4-byte Address Mode */
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE 0x01
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#define JEDEC_ENTER_4_BYTE_ADDR_MODE_INSIZE 0x00
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/* Exit 4-byte Address Mode */
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE 0x01
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#define JEDEC_EXIT_4_BYTE_ADDR_MODE_INSIZE 0x00
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/* Write Extended Address Register */
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#define JEDEC_WRITE_EXT_ADDR_REG 0xC5
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#define JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE 0x02
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#define JEDEC_WRITE_EXT_ADDR_REG_INSIZE 0x00
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/* Read Extended Address Register */
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#define JEDEC_READ_EXT_ADDR_REG 0xC8
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#define JEDEC_READ_EXT_ADDR_REG_OUTSIZE 0x01
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#define JEDEC_READ_EXT_ADDR_REG_INSIZE 0x01
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/* Read the memory with 4-byte address
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From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
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#define JEDEC_READ_4BA 0x13
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#define JEDEC_READ_4BA_OUTSIZE 0x05
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/* JEDEC_READ_4BA_INSIZE : any length */
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/* Write memory byte with 4-byte address
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From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
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#define JEDEC_BYTE_PROGRAM_4BA 0x12
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#define JEDEC_BYTE_PROGRAM_4BA_OUTSIZE 0x06
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#define JEDEC_BYTE_PROGRAM_4BA_INSIZE 0x00
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/* Sector Erase 0x21 (with 4-byte address), usually 4k size.
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From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
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#define JEDEC_SE_4BA 0x21
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#define JEDEC_SE_4BA_OUTSIZE 0x05
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#define JEDEC_SE_4BA_INSIZE 0x00
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/* Block Erase 0x5C (with 4-byte address), usually 32k size.
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From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
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#define JEDEC_BE_5C_4BA 0x5C
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#define JEDEC_BE_5C_4BA_OUTSIZE 0x05
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#define JEDEC_BE_5C_4BA_INSIZE 0x00
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/* Block Erase 0xDC (with 4-byte address), usually 64k size.
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From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */
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#define JEDEC_BE_DC_4BA 0xdc
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#define JEDEC_BE_DC_4BA_OUTSIZE 0x05
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#define JEDEC_BE_DC_4BA_INSIZE 0x00
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/* enter 4-bytes addressing mode */
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int spi_enter_4ba_b7(struct flashctx *flash);
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int spi_enter_4ba_b7_we(struct flashctx *flash);
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/* exit 4-bytes addressing mode */
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int spi_exit_4ba_e9(struct flashctx *flash);
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int spi_exit_4ba_e9_we(struct flashctx *flash);
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/* read/write flash bytes in 4-bytes addressing mode */
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int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte);
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int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
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int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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/* erase flash bytes in 4-bytes addressing mode */
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int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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/* read/write flash bytes from 3-bytes addressing mode using extended address register */
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int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte);
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int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
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int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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/* erase flash bytes from 3-bytes addressing mode using extended address register */
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int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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/* read/write flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */
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int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t databyte);
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int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
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int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
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/* erase flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */
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int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
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int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata);
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#endif /* __SPI_4BA_H__ */
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