mirror of
https://review.coreboot.org/flashrom.git
synced 2025-04-26 22:52:34 +02:00

Added optional support for all the commands specified in JESD260. Added a new optional dependency to openssls libcrypto. Added parsing for the rpmc parameter sfdp table. Added necessary rpmc parameter information to flashchips struct and the flash hardening feature to enable rpmc commands. Enables future use of these commands in the cli_client and also libflashrom. Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Signed-off-by: Matti Finder <matti.finder@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84934 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
490 lines
14 KiB
C
490 lines
14 KiB
C
/*
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* This file is part of the flashrom project.
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*
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* Copyright (C) 2011-2012 Stefan Tauner
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "flash.h"
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#include "spi.h"
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#include "chipdrivers.h"
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static int spi_sfdp_read_sfdp_chunk(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
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{
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int i, ret;
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uint8_t *newbuf;
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const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
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JEDEC_SFDP,
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(address >> 16) & 0xff,
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(address >> 8) & 0xff,
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(address >> 0) & 0xff,
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/* FIXME: the following dummy byte explodes on some programmers.
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* One workaround is to read the dummy byte
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* instead and discard its value.
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*/
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0
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};
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msg_cspew("%s: addr=0x%"PRIx32", len=%d, data:\n", __func__, address, len);
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newbuf = malloc(len + 1);
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if (!newbuf)
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return SPI_PROGRAMMER_ERROR;
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ret = spi_send_command(flash, sizeof(cmd) - 1, len + 1, cmd, newbuf);
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memmove(buf, newbuf + 1, len);
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free(newbuf);
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if (ret)
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return ret;
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for (i = 0; i < len; i++)
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msg_cspew(" 0x%02x", buf[i]);
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msg_cspew("\n");
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return 0;
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}
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static int spi_sfdp_read_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
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{
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/* FIXME: There are different upper bounds for the number of bytes to
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* read on the various programmers (even depending on the rest of the
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* structure of the transaction). 2 is a safe bet. */
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int maxstep = 2;
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int ret = 0;
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while (len > 0) {
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int step = min(len, maxstep);
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ret = spi_sfdp_read_sfdp_chunk(flash, address, buf, step);
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if (ret)
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return ret;
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address += step;
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buf += step;
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len -= step;
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}
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return ret;
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}
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struct sfdp_tbl_hdr {
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uint8_t id;
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uint8_t v_minor;
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uint8_t v_major;
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uint8_t len;
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uint32_t ptp; /* 24b pointer */
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};
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static int sfdp_add_uniform_eraser(struct flashchip *chip, uint8_t opcode, uint32_t block_size)
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{
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int i;
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uint32_t total_size = chip->total_size * 1024;
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enum block_erase_func erasefn = spi25_get_erasefn_from_opcode(opcode);
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if (erasefn == NO_BLOCK_ERASE_FUNC || total_size == 0 || block_size == 0 ||
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total_size % block_size != 0) {
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msg_cdbg("%s: invalid input, please report to "
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"flashrom@flashrom.org\n", __func__);
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return 1;
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}
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for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
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struct block_eraser *eraser = &chip->block_erasers[i];
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/* Check for duplicates (including (some) non-uniform ones). */
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if (eraser->eraseblocks[0].size == block_size &&
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eraser->block_erase == erasefn) {
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msg_cdbg2(" Tried to add a duplicate block eraser: "
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"%"PRId32" x %"PRId32" B with opcode 0x%02x.\n",
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total_size/block_size, block_size, opcode);
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return 1;
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}
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if (eraser->eraseblocks[0].size != 0 ||
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eraser->block_erase != NO_BLOCK_ERASE_FUNC) {
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msg_cspew(" Block Eraser %d is already occupied.\n",
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i);
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continue;
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}
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eraser->block_erase = erasefn;
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eraser->eraseblocks[0].size = block_size;
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eraser->eraseblocks[0].count = total_size/block_size;
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msg_cdbg2(" Block eraser %d: %"PRId32" x %"PRId32" B with opcode "
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"0x%02x\n", i, total_size/block_size, block_size,
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opcode);
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return 0;
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}
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msg_cinfo("%s: Not enough space to store another eraser (i=%d)."
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" Please report this at flashrom@flashrom.org\n",
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__func__, i);
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return 1;
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}
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static int sfdp_fill_flash(struct flashchip *chip, uint8_t *buf, uint16_t len)
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{
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uint8_t opcode_4k_erase = 0xFF;
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uint32_t tmp32;
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uint8_t tmp8;
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uint32_t total_size; /* in bytes */
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uint32_t block_size;
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int j;
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msg_cdbg("Parsing JEDEC flash parameter table... ");
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msg_cdbg2("\n");
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/* 1. double word */
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tmp32 = ((unsigned int)buf[(4 * 0) + 0]);
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tmp32 |= ((unsigned int)buf[(4 * 0) + 1]) << 8;
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tmp32 |= ((unsigned int)buf[(4 * 0) + 2]) << 16;
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tmp32 |= ((unsigned int)buf[(4 * 0) + 3]) << 24;
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tmp8 = (tmp32 >> 17) & 0x3;
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switch (tmp8) {
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case 0x0:
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msg_cdbg2(" 3-Byte only addressing.\n");
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break;
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case 0x1:
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msg_cdbg2(" 3-Byte (and optionally 4-Byte) addressing.\n");
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break;
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case 0x2:
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msg_cdbg(" 4-Byte only addressing (not supported by "
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"flashrom).\n");
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return 1;
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default:
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msg_cdbg(" Required addressing mode (0x%x) not supported.\n",
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tmp8);
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return 1;
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}
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msg_cdbg2(" Status register is ");
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if (tmp32 & (1 << 3)) {
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msg_cdbg2("volatile and writes to the status register have to "
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"be enabled with ");
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if (tmp32 & (1 << 4)) {
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chip->feature_bits = FEATURE_WRSR_WREN;
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msg_cdbg2("WREN (0x06).\n");
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} else {
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chip->feature_bits = FEATURE_WRSR_EWSR;
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msg_cdbg2("EWSR (0x50).\n");
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}
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} else {
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msg_cdbg2("non-volatile and the standard does not allow "
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"vendors to tell us whether EWSR/WREN is needed for "
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"status register writes - assuming EWSR.\n");
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chip->feature_bits = FEATURE_WRSR_EWSR;
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}
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msg_cdbg2(" Write chunk size is ");
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if (tmp32 & (1 << 2)) {
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msg_cdbg2("at least 64 B.\n");
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chip->page_size = 64;
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chip->write = SPI_CHIP_WRITE256;
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} else {
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msg_cdbg2("1 B only.\n");
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chip->page_size = 256;
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chip->write = SPI_CHIP_WRITE1;
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}
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if ((tmp32 & 0x3) == 0x1) {
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opcode_4k_erase = (tmp32 >> 8) & 0xFF;
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msg_cspew(" 4kB erase opcode is 0x%02x.\n", opcode_4k_erase);
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/* add the eraser later, because we don't know total_size yet */
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} else
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msg_cspew(" 4kB erase opcode is not defined.\n");
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/* 2. double word */
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tmp32 = ((unsigned int)buf[(4 * 1) + 0]);
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tmp32 |= ((unsigned int)buf[(4 * 1) + 1]) << 8;
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tmp32 |= ((unsigned int)buf[(4 * 1) + 2]) << 16;
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tmp32 |= ((unsigned int)buf[(4 * 1) + 3]) << 24;
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if (tmp32 & (1 << 31)) {
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msg_cdbg("Flash chip size >= 4 Gb/512 MB not supported.\n");
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return 1;
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}
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total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
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chip->total_size = total_size / 1024;
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msg_cdbg2(" Flash chip size is %d kB.\n", chip->total_size);
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if (total_size > (1 << 24)) {
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msg_cdbg("Flash chip size is bigger than what 3-Byte addressing "
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"can access.\n");
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return 1;
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}
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if (opcode_4k_erase != 0xFF)
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sfdp_add_uniform_eraser(chip, opcode_4k_erase, 4 * 1024);
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/* FIXME: double words 3-7 contain unused fast read information */
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if (len == 4 * 4) {
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msg_cdbg(" It seems like this chip supports the preliminary "
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"Intel version of SFDP, skipping processing of double "
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"words 3-9.\n");
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goto done;
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}
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/* 8. double word */
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for (j = 0; j < 4; j++) {
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/* 7 double words from the start + 2 bytes for every eraser */
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tmp8 = buf[(4 * 7) + (j * 2)];
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msg_cspew(" Erase Sector Type %d Size: 0x%02x\n", j + 1,
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tmp8);
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if (tmp8 == 0) {
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msg_cspew(" Erase Sector Type %d is unused.\n", j);
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continue;
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}
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if (tmp8 >= 31) {
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msg_cdbg2(" Block size of erase Sector Type %d (2^%d) "
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"is too big for flashrom.\n", j, tmp8);
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continue;
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}
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block_size = 1 << (tmp8); /* block_size = 2 ^ field */
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tmp8 = buf[(4 * 7) + (j * 2) + 1];
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msg_cspew(" Erase Sector Type %d Opcode: 0x%02x\n", j + 1,
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tmp8);
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sfdp_add_uniform_eraser(chip, tmp8, block_size);
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}
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done:
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msg_cdbg("done.\n");
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return 0;
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}
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static unsigned int bits_to_counter_delay(const uint8_t bits)
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{
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unsigned int value = bits & 0xf;
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switch ((bits & (0b11 << 4)) >> 4) {
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case 0b00:
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value *= 1;
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break;
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case 0b01:
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value *= 16;
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break;
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case 0b10:
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value *= 128;
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break;
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case 0b11:
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value *= 1000;
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break;
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}
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return value;
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}
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static int parse_rpmc_parameter_table(struct flashchip *const chip, const uint8_t *const buf, const uint16_t len)
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{
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if (len != 2 * 4) {
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msg_cdbg("Length of RPMC parameter table is wrong, skipping it\n");
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return 1;
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}
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msg_cdbg("Parsing rpmc parameter table...\n");
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// first dword
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uint32_t first_dword = ((unsigned int)buf[(4 * 0) + 0]);
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first_dword |= ((unsigned int)buf[(4 * 0) + 1]) << 8;
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first_dword |= ((unsigned int)buf[(4 * 0) + 2]) << 16;
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first_dword |= ((unsigned int)buf[(4 * 0) + 3]) << 24;
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if ((first_dword & 0b1) != 0) {
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// flash hardening is not supported
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msg_cdbg("Flash Hardening not supported\n");
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goto done;
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}
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chip->feature_bits |= FEATURE_FLASH_HARDENING;
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chip->rpmc_ctx.busy_polling_method = (first_dword & (1 << 2)) >> 2;
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msg_cspew("Busy polling method: %u\n", chip->rpmc_ctx.busy_polling_method);
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chip->rpmc_ctx.num_counters = ((first_dword & (0xf << 4)) >> 4) + 1;
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msg_cspew("Number of counters: %u\n", chip->rpmc_ctx.num_counters);
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chip->rpmc_ctx.op1_opcode = (first_dword & (0xff << 8)) >> 8;
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msg_cspew("OP1 opcode: 0x%02x\n", chip->rpmc_ctx.op1_opcode);
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chip->rpmc_ctx.op2_opcode = (first_dword & (0xff << 16)) >> 16;
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msg_cspew("OP2 opcode: 0x%02x\n", chip->rpmc_ctx.op2_opcode);
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chip->rpmc_ctx.update_rate = 5 * (1 << ((first_dword & (0xf << 24)) >> 24));
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msg_cspew("Update rate: %u seconds\n", chip->rpmc_ctx.update_rate);
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// second dword
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uint32_t second_dword = ((unsigned int)buf[(4 * 1) + 0]);
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second_dword |= ((unsigned int)buf[(4 * 1) + 1]) << 8;
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second_dword |= ((unsigned int)buf[(4 * 1) + 2]) << 16;
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second_dword |= ((unsigned int)buf[(4 * 1) + 3]) << 24;
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chip->rpmc_ctx.polling_delay_read_counter_us = bits_to_counter_delay(second_dword & 0xf);
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msg_cspew("Read counter polling delay: %u us\n", chip->rpmc_ctx.polling_delay_read_counter_us);
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chip->rpmc_ctx.polling_short_delay_write_counter_us = bits_to_counter_delay((second_dword >> 8) & 0xf);
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msg_cspew("Write counter short polling delay: %u us\n",
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chip->rpmc_ctx.polling_short_delay_write_counter_us);
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chip->rpmc_ctx.polling_long_delay_write_counter_us = bits_to_counter_delay((second_dword >> 16) & 0xf) * 1000;
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msg_cspew("Write counter long polling delay: %u us\n",
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chip->rpmc_ctx.polling_long_delay_write_counter_us);
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done:
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msg_cdbg("done.\n");
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return 0;
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}
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int probe_spi_sfdp(struct flashctx *flash)
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{
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int ret = 0;
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uint8_t buf[8];
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uint32_t tmp32;
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uint8_t nph;
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/* need to limit the table loop by comparing i to uint8_t nph hence: */
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uint16_t i;
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struct sfdp_tbl_hdr *hdrs;
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uint8_t *hbuf;
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uint8_t *tbuf;
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if (spi_sfdp_read_sfdp(flash, 0x00, buf, 4)) {
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msg_cdbg("Receiving SFDP signature failed.\n");
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return 0;
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}
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tmp32 = buf[0];
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tmp32 |= ((unsigned int)buf[1]) << 8;
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tmp32 |= ((unsigned int)buf[2]) << 16;
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tmp32 |= ((unsigned int)buf[3]) << 24;
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if (tmp32 != 0x50444653) {
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msg_cdbg2("Signature = 0x%08"PRIx32" (should be 0x50444653)\n", tmp32);
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msg_cdbg("No SFDP signature found.\n");
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return 0;
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}
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if (spi_sfdp_read_sfdp(flash, 0x04, buf, 3)) {
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msg_cdbg("Receiving SFDP revision and number of parameter "
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"headers (NPH) failed. ");
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return 0;
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}
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msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
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if (buf[1] != 0x01) {
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msg_cdbg("The chip supports an unknown version of SFDP. "
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"Aborting SFDP probe!\n");
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return 0;
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}
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nph = buf[2];
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msg_cdbg2("SFDP number of parameter headers is %d (NPH = %d).\n",
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nph + 1, nph);
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/* Fetch all parameter headers, even if we don't use them all (yet). */
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hbuf = malloc((nph + 1) * 8);
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hdrs = malloc((nph + 1) * sizeof(*hdrs));
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if (hbuf == NULL || hdrs == NULL ) {
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msg_gerr("Out of memory!\n");
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goto cleanup_hdrs;
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}
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if (spi_sfdp_read_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
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msg_cdbg("Receiving SFDP parameter table headers failed.\n");
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goto cleanup_hdrs;
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}
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for (i = 0; i <= nph; i++) {
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uint16_t len;
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hdrs[i].id = hbuf[(8 * i) + 0];
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hdrs[i].v_minor = hbuf[(8 * i) + 1];
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hdrs[i].v_major = hbuf[(8 * i) + 2];
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hdrs[i].len = hbuf[(8 * i) + 3];
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hdrs[i].ptp = hbuf[(8 * i) + 4];
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hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
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hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
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msg_cdbg2("\nSFDP parameter table header %d/%d:\n", i, nph);
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msg_cdbg2(" ID 0x%02x, version %d.%d\n", hdrs[i].id,
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hdrs[i].v_major, hdrs[i].v_minor);
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len = hdrs[i].len * 4;
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tmp32 = hdrs[i].ptp;
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msg_cdbg2(" Length %d B, Parameter Table Pointer 0x%06"PRIx32"\n",
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len, tmp32);
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if (tmp32 + len >= (1 << 24)) {
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msg_cdbg("SFDP Parameter Table %d supposedly overflows "
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"addressable SFDP area. This most\nprobably "
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"indicates a corrupt SFDP parameter table "
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"header. Skipping it.\n", i);
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continue;
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}
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tbuf = malloc(len);
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if (tbuf == NULL) {
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msg_gerr("Out of memory!\n");
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goto cleanup_hdrs;
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}
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if (spi_sfdp_read_sfdp(flash, tmp32, tbuf, len)){
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msg_cdbg("Fetching SFDP parameter table %d failed.\n",
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i);
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free(tbuf);
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continue;
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}
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msg_cspew(" Parameter table contents:\n");
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for (tmp32 = 0; tmp32 < len; tmp32++) {
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if ((tmp32 % 8) == 0) {
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msg_cspew(" 0x%04"PRIx32": ", tmp32);
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}
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msg_cspew(" %02x", tbuf[tmp32]);
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if ((tmp32 % 8) == 7) {
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msg_cspew("\n");
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continue;
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}
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if ((tmp32 % 8) == 3) {
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msg_cspew(" ");
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continue;
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}
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}
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msg_cspew("\n");
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if (i == 0) {
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if (hdrs[i].id != 0) {
|
|
msg_cerr("ID of the mandatory JEDEC SFDP "
|
|
"parameter table is not 0 as demanded "
|
|
"by JESD216.\n");
|
|
} else if (hdrs[i].v_major != 0x01) {
|
|
msg_cdbg("The chip contains an unknown "
|
|
"version of the JEDEC flash "
|
|
"parameters table (Version: %u.%u), skipping it.\n",
|
|
hdrs[i].v_major, hdrs[i].v_minor);
|
|
} else if (len != 4 * 4 && len < 9 * 4) {
|
|
msg_cdbg("Length of the mandatory JEDEC SFDP "
|
|
"parameter table is wrong (%d B), "
|
|
"skipping it.\n", len);
|
|
} else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0) {
|
|
ret = 1;
|
|
}
|
|
} else {
|
|
/* TODO: implement parsing for other pages */
|
|
switch (hdrs[i].id){
|
|
case 0x03: /* RPMC parameter table as specified in JESD260 */
|
|
if (hdrs[i].v_major != 0x01 || hdrs[i].v_minor != 0x0) {
|
|
msg_cdbg("The chip contains an unknown "
|
|
"version of the JEDEC RPMC "
|
|
"parameters table (Version: %u.%u), skipping it.\n",
|
|
hdrs[i].v_major, hdrs[i].v_minor);
|
|
} else {
|
|
parse_rpmc_parameter_table(flash->chip, tbuf, len);
|
|
}
|
|
break;
|
|
default:
|
|
msg_cdbg("Support for SFDP Page with ID 0x%02x not implemented"
|
|
", skipping it.\n",
|
|
hdrs[i].id);
|
|
break;
|
|
}
|
|
}
|
|
|
|
free(tbuf);
|
|
}
|
|
|
|
cleanup_hdrs:
|
|
free(hdrs);
|
|
free(hbuf);
|
|
return ret;
|
|
}
|