johann/cpu_features
1
0
Fork 0
mirror of https://github.com/google/cpu_features.git synced 2025-04-27 23:22:31 +02:00
Code Issues Releases Wiki Activity

Get rid repeated branch (#269)

Browse Source 
* Get rid repeated branch
* Update cache type field comment
This commit is contained in:
Mykola Hohsadze 2022-08-18 11:39:00 +03:00 committed by GitHub
parent 4e8d2e3a22
commit cd97c7cee7
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/impl_x86__base_implementation.inl
View File

@ -1656,16 +1656,18 @@ static void ParseCacheInfo(const int max_cpuid_leaf, uint32_t leaf_id,
const Leaf leaf = SafeCpuIdEx(max_cpuid_leaf, leaf_id, index);
int cache_type_field = ExtractBitRange(leaf.eax, 4, 0);
CacheType cache_type;
if (cache_type_field == 0)
break;
else if (cache_type_field == 1)
if (cache_type_field == 1)
cache_type = CPU_FEATURE_CACHE_DATA;
else if (cache_type_field == 2)
cache_type = CPU_FEATURE_CACHE_INSTRUCTION;
else if (cache_type_field == 3)
cache_type = CPU_FEATURE_CACHE_UNIFIED;
else
break; // Should not occur as per documentation.
// Intel Processor Identification and the CPUID Instruction Application
// Note 485 page 37 Table 5-10. Deterministic Cache Parameters.
// We skip cache parsing in case null of cache type or cache type in the
// range of 4-31 according to documentation.
break;
int level = ExtractBitRange(leaf.eax, 7, 5);
int line_size = ExtractBitRange(leaf.ebx, 11, 0) + 1;
int partitioning = ExtractBitRange(leaf.ebx, 21, 12) + 1;