mirror of
https://github.com/google/cpu_features.git
synced 2025-06-30 21:02:34 +02:00
Update features for AArch64.
Add all missing features up to Linux v5.0. Features added: evtstrm, atomics, fphp, asimdhp, cpuid, asimdrdm, jscvt, fcma, lrcpc, dcpop, sha3, sm3, sm4, asimddp, sha512, sve, asimdfhm, dit, uscat, ilrcpc, flagm, ssbs, sb, paca, pacg.
This commit is contained in:
@ -25,20 +25,70 @@
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DECLARE_SETTER(Aarch64Features, fp)
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DECLARE_SETTER(Aarch64Features, asimd)
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DECLARE_SETTER(Aarch64Features, evtstrm)
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DECLARE_SETTER(Aarch64Features, aes)
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DECLARE_SETTER(Aarch64Features, pmull)
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DECLARE_SETTER(Aarch64Features, sha1)
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DECLARE_SETTER(Aarch64Features, sha2)
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DECLARE_SETTER(Aarch64Features, crc32)
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DECLARE_SETTER(Aarch64Features, atomics)
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DECLARE_SETTER(Aarch64Features, fphp)
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DECLARE_SETTER(Aarch64Features, asimdhp)
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DECLARE_SETTER(Aarch64Features, cpuid)
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DECLARE_SETTER(Aarch64Features, asimdrdm)
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DECLARE_SETTER(Aarch64Features, jscvt)
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DECLARE_SETTER(Aarch64Features, fcma)
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DECLARE_SETTER(Aarch64Features, lrcpc)
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DECLARE_SETTER(Aarch64Features, dcpop)
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DECLARE_SETTER(Aarch64Features, sha3)
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DECLARE_SETTER(Aarch64Features, sm3)
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DECLARE_SETTER(Aarch64Features, sm4)
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DECLARE_SETTER(Aarch64Features, asimddp)
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DECLARE_SETTER(Aarch64Features, sha512)
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DECLARE_SETTER(Aarch64Features, sve)
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DECLARE_SETTER(Aarch64Features, asimdfhm)
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DECLARE_SETTER(Aarch64Features, dit)
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DECLARE_SETTER(Aarch64Features, uscat)
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DECLARE_SETTER(Aarch64Features, ilrcpc)
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DECLARE_SETTER(Aarch64Features, flagm)
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DECLARE_SETTER(Aarch64Features, ssbs)
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DECLARE_SETTER(Aarch64Features, sb)
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DECLARE_SETTER(Aarch64Features, paca)
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DECLARE_SETTER(Aarch64Features, pacg)
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static const CapabilityConfig kConfigs[] = {
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[AARCH64_FP] = {{AARCH64_HWCAP_FP, 0}, "fp", &set_fp}, //
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[AARCH64_ASIMD] = {{AARCH64_HWCAP_ASIMD, 0}, "asimd", &set_asimd}, //
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[AARCH64_AES] = {{AARCH64_HWCAP_AES, 0}, "aes", &set_aes}, //
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[AARCH64_PMULL] = {{AARCH64_HWCAP_PMULL, 0}, "pmull", &set_pmull}, //
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[AARCH64_SHA1] = {{AARCH64_HWCAP_SHA1, 0}, "sha1", &set_sha1}, //
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[AARCH64_SHA2] = {{AARCH64_HWCAP_SHA2, 0}, "sha2", &set_sha2}, //
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[AARCH64_CRC32] {{AARCH64_HWCAP_CRC32, 0}, "crc32", &set_crc32}, //
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[AARCH64_FP] = {{AARCH64_HWCAP_FP, 0}, "fp", &set_fp},
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[AARCH64_ASIMD] = {{AARCH64_HWCAP_ASIMD, 0}, "asimd", &set_asimd},
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[AARCH64_EVTSTRM] = {{AARCH64_HWCAP_EVTSTRM, 0}, "evtstrm", &set_evtstrm},
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[AARCH64_AES] = {{AARCH64_HWCAP_AES, 0}, "aes", &set_aes},
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[AARCH64_PMULL] = {{AARCH64_HWCAP_PMULL, 0}, "pmull", &set_pmull},
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[AARCH64_SHA1] = {{AARCH64_HWCAP_SHA1, 0}, "sha1", &set_sha1},
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[AARCH64_SHA2] = {{AARCH64_HWCAP_SHA2, 0}, "sha2", &set_sha2},
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[AARCH64_CRC32] = {{AARCH64_HWCAP_CRC32, 0}, "crc32", &set_crc32},
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[AARCH64_ATOMICS] = {{AARCH64_HWCAP_ATOMICS, 0}, "atomics", &set_atomics},
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[AARCH64_FPHP] = {{AARCH64_HWCAP_FPHP, 0}, "fphp", &set_fphp},
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[AARCH64_ASIMDHP] = {{AARCH64_HWCAP_ASIMDHP, 0}, "asimdhp", &set_asimdhp},
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[AARCH64_CPUID] = {{AARCH64_HWCAP_CPUID, 0}, "cpuid", &set_cpuid},
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[AARCH64_ASIMDRDM] = {{AARCH64_HWCAP_ASIMDRDM, 0}, "asimdrdm", &set_asimdrdm},
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[AARCH64_JSCVT] = {{AARCH64_HWCAP_JSCVT, 0}, "jscvt", &set_jscvt},
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[AARCH64_FCMA] = {{AARCH64_HWCAP_FCMA, 0}, "fcma", &set_fcma},
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[AARCH64_LRCPC] = {{AARCH64_HWCAP_LRCPC, 0}, "lrcpc", &set_lrcpc},
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[AARCH64_DCPOP] = {{AARCH64_HWCAP_DCPOP, 0}, "dcpop", &set_dcpop},
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[AARCH64_SHA3] = {{AARCH64_HWCAP_SHA3, 0}, "sha3", &set_sha3},
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[AARCH64_SM3] = {{AARCH64_HWCAP_SM3, 0}, "sm3", &set_sm3},
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[AARCH64_SM4] = {{AARCH64_HWCAP_SM4, 0}, "sm4", &set_sm4},
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[AARCH64_ASIMDDP] = {{AARCH64_HWCAP_ASIMDDP, 0}, "asimddp", &set_asimddp},
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[AARCH64_SHA512] = {{AARCH64_HWCAP_SHA512, 0}, "sha512", &set_sha512},
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[AARCH64_SVE] = {{AARCH64_HWCAP_SVE, 0}, "sve", &set_sve},
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[AARCH64_ASIMDFHM] = {{AARCH64_HWCAP_ASIMDFHM, 0}, "asimdfhm", &set_asimdfhm},
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[AARCH64_DIT] = {{AARCH64_HWCAP_DIT, 0}, "dit", &set_dit},
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[AARCH64_USCAT] = {{AARCH64_HWCAP_USCAT, 0}, "uscat", &set_uscat},
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[AARCH64_ILRCPC] = {{AARCH64_HWCAP_ILRCPC, 0}, "ilrcpc", &set_ilrcpc},
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[AARCH64_FLAGM] = {{AARCH64_HWCAP_FLAGM, 0}, "flagm", &set_flagm},
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[AARCH64_SSBS] = {{AARCH64_HWCAP_SSBS, 0}, "ssbs", &set_ssbs},
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[AARCH64_SB] = {{AARCH64_HWCAP_SB, 0}, "sb", &set_sb},
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[AARCH64_PACA] = {{AARCH64_HWCAP_PACA, 0}, "paca", &set_paca},
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[AARCH64_PACG] = {{AARCH64_HWCAP_PACG, 0}, "pacg", &set_pacg},
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};
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static const size_t kConfigsSize = sizeof(kConfigs) / sizeof(CapabilityConfig);
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@ -105,6 +155,8 @@ int GetAarch64FeaturesEnumValue(const Aarch64Features* features,
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return features->fp;
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case AARCH64_ASIMD:
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return features->asimd;
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case AARCH64_EVTSTRM:
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return features->evtstrm;
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case AARCH64_AES:
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return features->aes;
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case AARCH64_PMULL:
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@ -115,6 +167,54 @@ int GetAarch64FeaturesEnumValue(const Aarch64Features* features,
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return features->sha2;
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case AARCH64_CRC32:
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return features->crc32;
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case AARCH64_ATOMICS:
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return features->atomics;
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case AARCH64_FPHP:
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return features->fphp;
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case AARCH64_ASIMDHP:
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return features->asimdhp;
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case AARCH64_CPUID:
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return features->cpuid;
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case AARCH64_ASIMDRDM:
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return features->asimdrdm;
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case AARCH64_JSCVT:
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return features->jscvt;
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case AARCH64_FCMA:
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return features->fcma;
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case AARCH64_LRCPC:
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return features->lrcpc;
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case AARCH64_DCPOP:
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return features->dcpop;
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case AARCH64_SHA3:
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return features->sha3;
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case AARCH64_SM3:
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return features->sm3;
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case AARCH64_SM4:
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return features->sm4;
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case AARCH64_ASIMDDP:
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return features->asimddp;
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case AARCH64_SHA512:
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return features->sha512;
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case AARCH64_SVE:
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return features->sve;
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case AARCH64_ASIMDFHM:
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return features->asimdfhm;
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case AARCH64_DIT:
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return features->dit;
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case AARCH64_USCAT:
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return features->uscat;
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case AARCH64_ILRCPC:
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return features->ilrcpc;
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case AARCH64_FLAGM:
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return features->flagm;
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case AARCH64_SSBS:
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return features->ssbs;
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case AARCH64_SB:
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return features->sb;
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case AARCH64_PACA:
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return features->paca;
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case AARCH64_PACG:
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return features->pacg;
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case AARCH64_LAST_:
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break;
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}
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