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mirror of https://github.com/google/cpu_features.git synced 2025-04-28 15:33:37 +02:00

9 Commits

Author SHA1 Message Date
Andrei Kurushin
d3c5e369db
test enum macro consistency (#257) 2022-07-28 12:34:42 +02:00
Tamas Zsoldos
b04a9daf71
Update AArch64 features to Linux 5.17. (#237) 2022-04-27 10:26:29 +02:00
Guillaume Chatelet
b3ef4ef49d
Avoid leaking internal headers for ppc (#164) 2021-06-30 11:51:26 +02:00
Tamas Zsoldos
e2f6dea65f
Update AArch64 features to Linux 5.10 (#149)
Added feature: MTE.
2020-12-15 13:28:53 +01:00
Guillaume Chatelet
3cc8f310d9 [NFC] Update copyright from Google Inc. to Google LLC 2020-10-12 08:55:20 +00:00
Guillaume Chatelet
22a5362e11
[NFC] clang-format codebase (#134)
* [NFC] clang-format codebase

* revert to 80 char columns at the price of uglier table init

* Specifically disabling clang-format for table initialization
2020-09-23 09:52:20 +00:00
Tamas Zsoldos
73d10ad25b
Update features for AArch64 to Linux 5.8 (#122)
This adds the following features: dcpodp, sve2, sveaes, svepmull,
svebitperm, svesha3, svesm4, flagm2, frint, svei8mm, svef32mm,
svef64mm, svebf16, i8mm, bf16, dgh and rng.

With these, all features used by Linux 5.8 on AArch64 is supported.

Fixes #126
2020-09-21 07:50:38 +00:00
Tamas Zsoldos
d835b4958c Update features for AArch64.
Add all missing features up to Linux v5.0.

Features added: evtstrm, atomics, fphp, asimdhp, cpuid, asimdrdm,
jscvt, fcma, lrcpc, dcpop, sha3, sm3, sm4, asimddp, sha512, sve,
asimdfhm, dit, uscat, ilrcpc, flagm, ssbs, sb, paca, pacg.
2019-10-11 11:02:00 +02:00
Guillaume Chatelet
439d371594 Adding code. Closes #0. 2018-02-01 10:03:09 +01:00