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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

atahpt: restore flash access state explicitly

Instead of using reversible write (rpci_write_long) that relies on
global state, do it manually. Save original PCI config space
register contents to programmer's structure during initialization
and restore it in programmer's shutdown.

TOPIC=reduce_global_pci_state
TEST=builds

Change-Id: I9996bb4d71801034e66ba0c233846e19fa29224d
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Ticket: https://ticket.coreboot.org/issues/389
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
This commit is contained in:
Alexander Goncharov 2022-06-24 16:58:16 +03:00 committed by Anastasia Klimchuk
parent db026ea281
commit 02f43e89ba

View File

@ -25,11 +25,14 @@
#define BIOS_ROM_DATA 0x94
#define REG_FLASH_ACCESS 0x58
#define BIT_FLASH_ACCESS BIT(24)
#define PCI_VENDOR_ID_HPT 0x1103
struct atahpt_data {
struct pci_dev *dev;
uint32_t io_base_addr;
uint32_t flash_access;
};
static const struct dev_entry ata_hpt[] = {
@ -60,6 +63,11 @@ static uint8_t atahpt_chip_readb(const struct flashctx *flash,
static int atahpt_shutdown(void *par_data)
{
struct atahpt_data *data = par_data;
/* Restore original flash access state. */
pci_write_long(data->dev, REG_FLASH_ACCESS, data->flash_access);
free(par_data);
return 0;
}
@ -80,7 +88,6 @@ static int atahpt_init(void)
{
struct pci_dev *dev = NULL;
uint32_t io_base_addr;
uint32_t reg32;
if (rget_io_perms())
return 1;
@ -93,18 +100,18 @@ static int atahpt_init(void)
if (!io_base_addr)
return 1;
/* Enable flash access. */
reg32 = pci_read_long(dev, REG_FLASH_ACCESS);
reg32 |= (1 << 24);
rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
struct atahpt_data *data = calloc(1, sizeof(*data));
if (!data) {
msg_perr("Unable to allocate space for PAR master data\n");
return 1;
}
data->dev = dev;
data->io_base_addr = io_base_addr;
/* Enable flash access. */
data->flash_access = pci_read_long(dev, REG_FLASH_ACCESS);
pci_write_long(dev, REG_FLASH_ACCESS, data->flash_access | BIT_FLASH_ACCESS);
return register_par_master(&par_master_atahpt, BUS_PARALLEL, data);
}