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Refine SPI bitbanging

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Change the SPI bitbanging core to fix a subtle bug (which had no
effect so far) and to make integration of the RayeR SPIPGM and Nvidia
MCP6x/MCP7x SPI patches easier. Kill a few global variables and require
explicit initialization of bitbanging delay.

A big to Johannes Sjölund for testing an earlier version of the code as
part of the Nvidia MCP6x/MCP7x SPI bitbanging patch.

Corresponding to flashrom svn r1085.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger 2010-07-17 12:54:09 +00:00
parent 1a854fc98c
commit 0d974e7a92
3 changed files with 25 additions and 16 deletions
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31
bitbang_spi.c
View File

@ -26,46 +26,55 @@
#include "chipdrivers.h"
#include "spi.h"
/* Length of half a clock period in usecs */
int bitbang_spi_half_period = 0;
/* Length of half a clock period in usecs. */
static int bitbang_spi_half_period;
enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;
static enum bitbang_spi_master bitbang_spi_master = BITBANG_SPI_INVALID;
const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
static const struct bitbang_spi_master_entry bitbang_spi_master_table[] = {
{}, /* This entry corresponds to BITBANG_SPI_INVALID. */
};
const int bitbang_spi_master_count = ARRAY_SIZE(bitbang_spi_master_table);
void bitbang_spi_set_cs(int val)
/* Note that CS# is active low, so val=0 means the chip is active. */
static void bitbang_spi_set_cs(int val)
{
bitbang_spi_master_table[bitbang_spi_master].set_cs(val);
}
void bitbang_spi_set_sck(int val)
static void bitbang_spi_set_sck(int val)
{
bitbang_spi_master_table[bitbang_spi_master].set_sck(val);
}
void bitbang_spi_set_mosi(int val)
static void bitbang_spi_set_mosi(int val)
{
bitbang_spi_master_table[bitbang_spi_master].set_mosi(val);
}
int bitbang_spi_get_miso(void)
static int bitbang_spi_get_miso(void)
{
return bitbang_spi_master_table[bitbang_spi_master].get_miso();
}
int bitbang_spi_init(void)
int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod)
{
bitbang_spi_master = master;
bitbang_spi_half_period = halfperiod;
if (bitbang_spi_master == BITBANG_SPI_INVALID) {
msg_perr("Invalid bitbang SPI master. \n"
"Please report a bug at flashrom@flashrom.org\n");
return 1;
}
bitbang_spi_set_cs(1);
bitbang_spi_set_sck(0);
buses_supported = CHIP_BUSTYPE_SPI;
bitbang_spi_set_mosi(0);
return 0;
}
uint8_t bitbang_spi_readwrite_byte(uint8_t val)
static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
{
uint8_t ret = 0;
int i;

6
flash.h
View File

@ -133,8 +133,6 @@ enum bitbang_spi_master {
extern const int bitbang_spi_master_count;
extern enum bitbang_spi_master bitbang_spi_master;
struct bitbang_spi_master_entry {
void (*set_cs) (int val);
void (*set_sck) (int val);
@ -533,9 +531,7 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
/* bitbang_spi.c */
extern int bitbang_spi_half_period;
extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
int bitbang_spi_init(void);
int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod);
int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);

4
hwaccess.h
View File

@ -176,6 +176,10 @@ cpu_to_be(64)
#define __DARWIN__
#endif
/* Clarification about OUTB/OUTW/OUTL argument order:
* OUT[BWL](val, port)
*/
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <machine/cpufunc.h>
#define off64_t off_t