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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00

Refine SPI bitbanging

Change the SPI bitbanging core to fix a subtle bug (which had no
effect so far) and to make integration of the RayeR SPIPGM and Nvidia
MCP6x/MCP7x SPI patches easier. Kill a few global variables and require
explicit initialization of bitbanging delay.

A big to Johannes Sjölund for testing an earlier version of the code as
part of the Nvidia MCP6x/MCP7x SPI bitbanging patch.

Corresponding to flashrom svn r1085.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
This commit is contained in:
Carl-Daniel Hailfinger
2010-07-17 12:54:09 +00:00
parent 1a854fc98c
commit 0d974e7a92
3 changed files with 25 additions and 16 deletions

View File

@ -133,8 +133,6 @@ enum bitbang_spi_master {
extern const int bitbang_spi_master_count;
extern enum bitbang_spi_master bitbang_spi_master;
struct bitbang_spi_master_entry {
void (*set_cs) (int val);
void (*set_sck) (int val);
@ -533,9 +531,7 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
/* bitbang_spi.c */
extern int bitbang_spi_half_period;
extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
int bitbang_spi_init(void);
int bitbang_spi_init(enum bitbang_spi_master master, int halfperiod);
int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);